Commit 09a4ec5d authored by Dillon Varone's avatar Dillon Varone Committed by Alex Deucher
Browse files

drm/amd/display: Refactor dc_state interface 



[WHY?]
Part of the dc_state interface that deals with adding streams and planes should
remain public, while others that deal with internal status' and subvp should be
private to DC.

[HOW?]
Move and rename the public functions to dc_state.h and private functions to
dc_state_priv.h. Also add some additional functions for extracting subvp meta
data from the state.

Reviewed-by: default avatarNicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Reviewed-by: default avatarJun Lei <jun.lei@amd.com>
Acked-by: default avatarWayne Lin <wayne.lin@amd.com>
Signed-off-by: default avatarDillon Varone <dillon.varone@amd.com>
Tested-by: default avatarDaniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent e5ffd126

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

+23 −22
Original line number Diff line number Diff line
@@ -37,6 +37,7 @@ 
#include "dc/dc_dmub_srv.h"

#include "dc/dc_edid_parser.h"

#include "dc/dc_stat.h"

#include "dc/dc_state.h"

#include "amdgpu_dm_trace.h"

#include "dpcd_defs.h"

#include "link/protocols/link_dpcd.h"
@@ -2607,7 +2608,7 @@ static enum dc_status amdgpu_dm_commit_zero_streams(struct dc *dc) 


	memset(del_streams, 0, sizeof(del_streams));



	context = dc_create_state(dc);

	context = dc_state_create(dc);

	if (context == NULL)

		goto context_alloc_fail;
@@ -2622,12 +2623,12 @@ static enum dc_status amdgpu_dm_commit_zero_streams(struct dc *dc) 


	/* Remove all planes for removed streams and then remove the streams */

	for (i = 0; i < del_streams_count; i++) {

		if (!dc_rem_all_planes_for_stream(dc, del_streams[i], context)) {

		if (!dc_state_rem_all_planes_for_stream(dc, del_streams[i], context)) {

			res = DC_FAIL_DETACH_SURFACES;

			goto fail;

		}



		res = dc_remove_stream_from_ctx(dc, context, del_streams[i]);

		res = dc_state_remove_stream(dc, context, del_streams[i]);

		if (res != DC_OK)

			goto fail;

	}
@@ -2635,7 +2636,7 @@ static enum dc_status amdgpu_dm_commit_zero_streams(struct dc *dc) 
	res = dc_commit_streams(dc, context->streams, context->stream_count);



fail:

	dc_release_state(context);

	dc_state_release(context);



context_alloc_fail:

	return res;
@@ -2662,7 +2663,7 @@ static int dm_suspend(void *handle) 


		dc_allow_idle_optimizations(adev->dm.dc, false);



		dm->cached_dc_state = dc_copy_state(dm->dc->current_state);

		dm->cached_dc_state = dc_state_create_copy(dm->dc->current_state);



		dm_gpureset_toggle_interrupts(adev, dm->cached_dc_state, false);
@@ -2909,7 +2910,7 @@ static int dm_resume(void *handle) 


		dm_gpureset_toggle_interrupts(adev, dm->cached_dc_state, true);



		dc_release_state(dm->cached_dc_state);

		dc_state_release(dm->cached_dc_state);

		dm->cached_dc_state = NULL;



		amdgpu_dm_irq_resume_late(adev);
@@ -2919,8 +2920,8 @@ static int dm_resume(void *handle) 
		return 0;

	}

	/* Recreate dc_state - DC invalidates it when setting power state to S3. */

	dc_release_state(dm_state->context);

	dm_state->context = dc_create_state(dm->dc);

	dc_state_release(dm_state->context);

	dm_state->context = dc_state_create(dm->dc);

	/* TODO: Remove dc_state->dccg, use dc->dccg directly. */

	dc_resource_state_construct(dm->dc, dm_state->context);
@@ -3998,7 +3999,7 @@ dm_atomic_duplicate_state(struct drm_private_obj *obj) 
	old_state = to_dm_atomic_state(obj->state);



	if (old_state && old_state->context)

		new_state->context = dc_copy_state(old_state->context);

		new_state->context = dc_state_create_copy(old_state->context);



	if (!new_state->context) {

		kfree(new_state);
@@ -4014,7 +4015,7 @@ static void dm_atomic_destroy_state(struct drm_private_obj *obj, 
	struct dm_atomic_state *dm_state = to_dm_atomic_state(state);



	if (dm_state && dm_state->context)

		dc_release_state(dm_state->context);

		dc_state_release(dm_state->context);



	kfree(dm_state);

}
@@ -4050,7 +4051,7 @@ static int amdgpu_dm_mode_config_init(struct amdgpu_device *adev) 
	if (!state)

		return -ENOMEM;



	state->context = dc_create_state(adev->dm.dc);

	state->context = dc_state_create(adev->dm.dc);

	if (!state->context) {

		kfree(state);

		return -ENOMEM;
@@ -4065,7 +4066,7 @@ static int amdgpu_dm_mode_config_init(struct amdgpu_device *adev) 


	r = amdgpu_display_modeset_create_props(adev);

	if (r) {

		dc_release_state(state->context);

		dc_state_release(state->context);

		kfree(state);

		return r;

	}
@@ -4077,7 +4078,7 @@ static int amdgpu_dm_mode_config_init(struct amdgpu_device *adev) 


	r = amdgpu_dm_audio_init(adev);

	if (r) {

		dc_release_state(state->context);

		dc_state_release(state->context);

		kfree(state);

		return r;

	}
@@ -6658,7 +6659,7 @@ static enum dc_status dm_validate_stream_and_context(struct dc *dc, 
	if (!dc_plane_state)

		goto cleanup;



	dc_state = dc_create_state(dc);

	dc_state = dc_state_create(dc);

	if (!dc_state)

		goto cleanup;
@@ -6685,9 +6686,9 @@ static enum dc_status dm_validate_stream_and_context(struct dc *dc, 
		dc_result = dc_validate_plane(dc, dc_plane_state);



	if (dc_result == DC_OK)

		dc_result = dc_add_stream_to_ctx(dc, dc_state, stream);

		dc_result = dc_state_add_stream(dc, dc_state, stream);



	if (dc_result == DC_OK && !dc_add_plane_to_context(

	if (dc_result == DC_OK && !dc_state_add_plane(

						dc,

						stream,

						dc_plane_state,
@@ -6699,7 +6700,7 @@ static enum dc_status dm_validate_stream_and_context(struct dc *dc, 


cleanup:

	if (dc_state)

		dc_release_state(dc_state);

		dc_state_release(dc_state);



	if (dc_plane_state)

		dc_plane_state_release(dc_plane_state);
@@ -8858,7 +8859,7 @@ static void amdgpu_dm_commit_streams(struct drm_atomic_state *state, 
					dc_stream_get_status(dm_new_crtc_state->stream);



			if (!status)

				status = dc_stream_get_status_from_state(dc_state,

				status = dc_state_get_stream_status(dc_state,

									 dm_new_crtc_state->stream);

			if (!status)

				drm_err(dev,
@@ -9783,7 +9784,7 @@ static int dm_update_crtc_state(struct amdgpu_display_manager *dm, 
				crtc->base.id);



		/* i.e. reset mode */

		if (dc_remove_stream_from_ctx(

		if (dc_state_remove_stream(

				dm->dc,

				dm_state->context,

				dm_old_crtc_state->stream) != DC_OK) {
@@ -9826,7 +9827,7 @@ static int dm_update_crtc_state(struct amdgpu_display_manager *dm, 
			DRM_DEBUG_ATOMIC("Enabling DRM crtc: %d\n",

					 crtc->base.id);



			if (dc_add_stream_to_ctx(

			if (dc_state_add_stream(

					dm->dc,

					dm_state->context,

					dm_new_crtc_state->stream) != DC_OK) {
@@ -10148,7 +10149,7 @@ static int dm_update_plane_state(struct dc *dc, 
		if (ret)

			return ret;



		if (!dc_remove_plane_from_context(

		if (!dc_state_remove_plane(

				dc,

				dm_old_crtc_state->stream,

				dm_old_plane_state->dc_state,
@@ -10226,7 +10227,7 @@ static int dm_update_plane_state(struct dc *dc, 
		 * state. It'll be released when the atomic state is

		 * cleaned.

		 */

		if (!dc_add_plane_to_context(

		if (!dc_state_add_plane(

				dc,

				dm_new_crtc_state->stream,

				dc_new_plane_state,

drivers/gpu/drm/amd/display/dc/Makefile

+1 −1
Original line number Diff line number Diff line
@@ -62,7 +62,7 @@ AMD_DC = $(addsuffix /Makefile, $(addprefix $(FULL_AMD_DISPLAY_PATH)/dc/,$(DC_LI 
include $(AMD_DC)



DISPLAY_CORE = dc.o dc_stat.o dc_resource.o dc_hw_sequencer.o dc_sink.o \

dc_surface.o dc_debug.o dc_stream.o dc_link_enc_cfg.o dc_link_exports.o

dc_surface.o dc_debug.o dc_stream.o dc_link_enc_cfg.o dc_link_exports.o dc_state.o



DISPLAY_CORE += dc_vm_helper.o

drivers/gpu/drm/amd/display/dc/clk_mgr/clk_mgr.c

+2 −1
Original line number Diff line number Diff line
@@ -29,6 +29,7 @@ 
#include "dc_types.h"

#include "dccg.h"

#include "clk_mgr_internal.h"

#include "dc_state_priv.h"

#include "link.h"



#include "dce100/dce_clk_mgr.h"
@@ -63,7 +64,7 @@ int clk_mgr_helper_get_active_display_cnt( 
		/* Don't count SubVP phantom pipes as part of active

		 * display count

		 */

		if (stream->mall_stream_config.type == SUBVP_PHANTOM)

		if (dc_state_get_stream_subvp_type(context, stream) == SUBVP_PHANTOM)

			continue;



		/*

drivers/gpu/drm/amd/display/dc/core/dc.c

+39 −132
Original line number Diff line number Diff line
@@ -34,6 +34,8 @@ 
#include "dce/dce_hwseq.h"



#include "resource.h"

#include "dc_state.h"

#include "dc_state_priv.h"



#include "gpio_service_interface.h"

#include "clk_mgr.h"
@@ -811,7 +813,7 @@ static void dc_destruct(struct dc *dc) 
		link_enc_cfg_init(dc, dc->current_state);



	if (dc->current_state) {

		dc_release_state(dc->current_state);

		dc_state_release(dc->current_state);

		dc->current_state = NULL;

	}
@@ -1028,7 +1030,7 @@ static bool dc_construct(struct dc *dc, 
	 * on creation it copies the contents of dc->dml

	 */



	dc->current_state = dc_create_state(dc);

	dc->current_state = dc_state_create(dc);



	if (!dc->current_state) {

		dm_error("%s: failed to create validate ctx\n", __func__);
@@ -1118,7 +1120,7 @@ static void dc_update_viusal_confirm_color(struct dc *dc, struct dc_state *conte 
static void disable_dangling_plane(struct dc *dc, struct dc_state *context)

{

	int i, j;

	struct dc_state *dangling_context = dc_create_state(dc);

	struct dc_state *dangling_context = dc_state_create(dc);

	struct dc_state *current_ctx;

	struct pipe_ctx *pipe;

	struct timing_generator *tg;
@@ -1164,6 +1166,7 @@ static void disable_dangling_plane(struct dc *dc, struct dc_state *context) 
		}



		if (should_disable && old_stream) {

			bool is_phantom = dc_state_get_stream_subvp_type(dc->current_state, old_stream) == SUBVP_PHANTOM;

			pipe = &dc->current_state->res_ctx.pipe_ctx[i];

			tg = pipe->stream_res.tg;

			/* When disabling plane for a phantom pipe, we must turn on the
@@ -1172,18 +1175,19 @@ static void disable_dangling_plane(struct dc *dc, struct dc_state *context) 
			 * state that can result in underflow or hang when enabling it

			 * again for different use.

			 */

			if (old_stream->mall_stream_config.type == SUBVP_PHANTOM) {

			if (is_phantom) {

				if (tg->funcs->enable_crtc) {

					int main_pipe_width, main_pipe_height;

					struct dc_stream_state *old_paired_stream = dc_state_get_paired_subvp_stream(dc->current_state, old_stream);



					main_pipe_width = old_stream->mall_stream_config.paired_stream->dst.width;

					main_pipe_height = old_stream->mall_stream_config.paired_stream->dst.height;

					main_pipe_width = old_paired_stream->dst.width;

					main_pipe_height = old_paired_stream->dst.height;

					if (dc->hwss.blank_phantom)

						dc->hwss.blank_phantom(dc, tg, main_pipe_width, main_pipe_height);

					tg->funcs->enable_crtc(tg);

				}

			}

			dc_rem_all_planes_for_stream(dc, old_stream, dangling_context);

			dc_state_rem_all_planes_for_stream(dc, old_stream, dangling_context);

			disable_all_writeback_pipes_for_stream(dc, old_stream, dangling_context);



			if (pipe->stream && pipe->plane_state)
@@ -1206,7 +1210,7 @@ static void disable_dangling_plane(struct dc *dc, struct dc_state *context) 
			 * The OTG is set to disable on falling edge of VUPDATE so the plane disable

			 * will still get it's double buffer update.

			 */

			if (old_stream->mall_stream_config.type == SUBVP_PHANTOM) {

			if (is_phantom) {

				if (tg->funcs->disable_phantom_crtc)

					tg->funcs->disable_phantom_crtc(tg);

			}
@@ -1215,7 +1219,7 @@ static void disable_dangling_plane(struct dc *dc, struct dc_state *context) 


	current_ctx = dc->current_state;

	dc->current_state = dangling_context;

	dc_release_state(current_ctx);

	dc_state_release(current_ctx);

}



static void disable_vbios_mode_if_required(
@@ -1287,7 +1291,7 @@ static void wait_for_no_pipes_pending(struct dc *dc, struct dc_state *context) 
		int count = 0;

		struct pipe_ctx *pipe = &context->res_ctx.pipe_ctx[i];



		if (!pipe->plane_state || pipe->stream->mall_stream_config.type == SUBVP_PHANTOM)

		if (!pipe->plane_state || dc_state_get_pipe_subvp_type(context, pipe) == SUBVP_PHANTOM)

			continue;



		/* Timeout 100 ms */
@@ -1513,7 +1517,7 @@ static void program_timing_sync( 
		}



		for (k = 0; k < group_size; k++) {

			struct dc_stream_status *status = dc_stream_get_status_from_state(ctx, pipe_set[k]->stream);

			struct dc_stream_status *status = dc_state_get_stream_status(ctx, pipe_set[k]->stream);



			status->timing_sync_info.group_id = num_group;

			status->timing_sync_info.group_size = group_size;
@@ -1840,7 +1844,7 @@ static enum dc_status dc_commit_state_no_check(struct dc *dc, struct dc_state *c 
		struct pipe_ctx *old_pipe = &dc->current_state->res_ctx.pipe_ctx[i];



		/* Check old context for SubVP */

		subvp_prev_use |= (old_pipe->stream && old_pipe->stream->mall_stream_config.type == SUBVP_PHANTOM);

		subvp_prev_use |= (dc_state_get_pipe_subvp_type(dc->current_state, old_pipe) == SUBVP_PHANTOM);

		if (subvp_prev_use)

			break;

	}
@@ -1998,9 +2002,9 @@ static enum dc_status dc_commit_state_no_check(struct dc *dc, struct dc_state *c 
	old_state = dc->current_state;

	dc->current_state = context;



	dc_release_state(old_state);

	dc_state_release(old_state);



	dc_retain_state(dc->current_state);

	dc_state_retain(dc->current_state);



	return result;

}
@@ -2071,7 +2075,7 @@ enum dc_status dc_commit_streams(struct dc *dc, 
	if (handle_exit_odm2to1)

		res = commit_minimal_transition_state(dc, dc->current_state);



	context = dc_create_state(dc);

	context = dc_state_create(dc);

	if (!context)

		goto context_alloc_fail;
@@ -2091,7 +2095,7 @@ enum dc_status dc_commit_streams(struct dc *dc, 
				streams[i]->out.otg_offset = context->stream_status[j].primary_otg_inst;



			if (dc_is_embedded_signal(streams[i]->signal)) {

				struct dc_stream_status *status = dc_stream_get_status_from_state(context, streams[i]);

				struct dc_stream_status *status = dc_state_get_stream_status(context, streams[i]);



				if (dc->hwss.is_abm_supported)

					status->is_abm_supported = dc->hwss.is_abm_supported(dc, context, streams[i]);
@@ -2102,7 +2106,7 @@ enum dc_status dc_commit_streams(struct dc *dc, 
	}



fail:

	dc_release_state(context);

	dc_state_release(context);



context_alloc_fail:
@@ -2156,7 +2160,7 @@ static bool is_flip_pending_in_pipes(struct dc *dc, struct dc_state *context) 
		pipe = &context->res_ctx.pipe_ctx[i];



		// Don't check flip pending on phantom pipes

		if (!pipe->plane_state || (pipe->stream && pipe->stream->mall_stream_config.type == SUBVP_PHANTOM))

		if (!pipe->plane_state || (dc_state_get_pipe_subvp_type(context, pipe) == SUBVP_PHANTOM))

			continue;



		/* Must set to false to start with, due to OR in update function */
@@ -2228,103 +2232,6 @@ void dc_post_update_surfaces_to_stream(struct dc *dc) 
	dc->optimized_required = false;

}



static void init_state(struct dc *dc, struct dc_state *context)

{

	/* Each context must have their own instance of VBA and in order to

	 * initialize and obtain IP and SOC the base DML instance from DC is

	 * initially copied into every context

	 */

	memcpy(&context->bw_ctx.dml, &dc->dml, sizeof(struct display_mode_lib));

}



struct dc_state *dc_create_state(struct dc *dc)

{

	struct dc_state *context = kvzalloc(sizeof(struct dc_state),

					    GFP_KERNEL);



	if (!context)

		return NULL;



	init_state(dc, context);



#ifdef CONFIG_DRM_AMD_DC_FP

	if (dc->debug.using_dml2) {

		dml2_create(dc, &dc->dml2_options, &context->bw_ctx.dml2);

	}

#endif

	kref_init(&context->refcount);



	return context;

}



struct dc_state *dc_copy_state(struct dc_state *src_ctx)

{

	int i, j;

	struct dc_state *new_ctx = kvmalloc(sizeof(struct dc_state), GFP_KERNEL);



	if (!new_ctx)

		return NULL;

	memcpy(new_ctx, src_ctx, sizeof(struct dc_state));



#ifdef CONFIG_DRM_AMD_DC_FP

	if (new_ctx->bw_ctx.dml2 && !dml2_create_copy(&new_ctx->bw_ctx.dml2, src_ctx->bw_ctx.dml2)) {

		dc_release_state(new_ctx);

		return NULL;

 	}

#endif



	for (i = 0; i < MAX_PIPES; i++) {

			struct pipe_ctx *cur_pipe = &new_ctx->res_ctx.pipe_ctx[i];



			if (cur_pipe->top_pipe)

				cur_pipe->top_pipe =  &new_ctx->res_ctx.pipe_ctx[cur_pipe->top_pipe->pipe_idx];



			if (cur_pipe->bottom_pipe)

				cur_pipe->bottom_pipe = &new_ctx->res_ctx.pipe_ctx[cur_pipe->bottom_pipe->pipe_idx];



			if (cur_pipe->prev_odm_pipe)

				cur_pipe->prev_odm_pipe =  &new_ctx->res_ctx.pipe_ctx[cur_pipe->prev_odm_pipe->pipe_idx];



			if (cur_pipe->next_odm_pipe)

				cur_pipe->next_odm_pipe = &new_ctx->res_ctx.pipe_ctx[cur_pipe->next_odm_pipe->pipe_idx];



	}



	for (i = 0; i < new_ctx->stream_count; i++) {

			dc_stream_retain(new_ctx->streams[i]);

			for (j = 0; j < new_ctx->stream_status[i].plane_count; j++)

				dc_plane_state_retain(

					new_ctx->stream_status[i].plane_states[j]);

	}



	kref_init(&new_ctx->refcount);



	return new_ctx;

}



void dc_retain_state(struct dc_state *context)

{

	kref_get(&context->refcount);

}



static void dc_state_free(struct kref *kref)

{

	struct dc_state *context = container_of(kref, struct dc_state, refcount);

	dc_resource_state_destruct(context);



#ifdef CONFIG_DRM_AMD_DC_FP

	dml2_destroy(context->bw_ctx.dml2);

	context->bw_ctx.dml2 = 0;

#endif



	kvfree(context);

}



void dc_release_state(struct dc_state *context)

{

	kref_put(&context->refcount, dc_state_free);

}



bool dc_set_generic_gpio_for_stereo(bool enable,

		struct gpio_service *gpio_service)

{
@@ -2992,7 +2899,7 @@ static void copy_stream_update_to_stream(struct dc *dc, 
				       update->dsc_config->num_slices_v != 0);



		/* Use temporarry context for validating new DSC config */

		struct dc_state *dsc_validate_context = dc_create_state(dc);

		struct dc_state *dsc_validate_context = dc_state_create(dc);



		if (dsc_validate_context) {

			dc_resource_state_copy_construct(dc->current_state, dsc_validate_context);
@@ -3005,7 +2912,7 @@ static void copy_stream_update_to_stream(struct dc *dc, 
				update->dsc_config = NULL;

			}



			dc_release_state(dsc_validate_context);

			dc_state_release(dsc_validate_context);

		} else {

			DC_ERROR("Failed to allocate new validate context for DSC change\n");

			update->dsc_config = NULL;
@@ -3104,7 +3011,7 @@ static bool update_planes_and_stream_state(struct dc *dc, 
			new_planes[i] = srf_updates[i].surface;



		/* initialize scratch memory for building context */

		context = dc_create_state(dc);

		context = dc_state_create(dc);

		if (context == NULL) {

			DC_ERROR("Failed to allocate new validate context!\n");

			return false;
@@ -3120,14 +3027,14 @@ static bool update_planes_and_stream_state(struct dc *dc, 
			dc->res_pool->funcs->remove_phantom_pipes(dc, context, false);



		/*remove old surfaces from context */

		if (!dc_rem_all_planes_for_stream(dc, stream, context)) {

		if (!dc_state_rem_all_planes_for_stream(dc, stream, context)) {



			BREAK_TO_DEBUGGER();

			goto fail;

		}



		/* add surface to context */

		if (!dc_add_all_planes_for_stream(dc, stream, new_planes, surface_count, context)) {

		if (!dc_state_add_all_planes_for_stream(dc, stream, new_planes, surface_count, context)) {



			BREAK_TO_DEBUGGER();

			goto fail;
@@ -3185,7 +3092,7 @@ static bool update_planes_and_stream_state(struct dc *dc, 
	return true;



fail:

	dc_release_state(context);

	dc_state_release(context);



	return false;
@@ -3626,7 +3533,7 @@ static void commit_planes_for_stream(struct dc *dc, 
		struct pipe_ctx *old_pipe = &dc->current_state->res_ctx.pipe_ctx[i];



		// Check old context for SubVP

		subvp_prev_use |= (old_pipe->stream && old_pipe->stream->mall_stream_config.type == SUBVP_PHANTOM);

		subvp_prev_use |= (dc_state_get_pipe_subvp_type(dc->current_state, old_pipe) == SUBVP_PHANTOM);

		if (subvp_prev_use)

			break;

	}
@@ -3634,7 +3541,7 @@ static void commit_planes_for_stream(struct dc *dc, 
	for (i = 0; i < dc->res_pool->pipe_count; i++) {

		struct pipe_ctx *pipe = &context->res_ctx.pipe_ctx[i];



		if (pipe->stream && pipe->stream->mall_stream_config.type == SUBVP_PHANTOM) {

		if (dc_state_get_pipe_subvp_type(context, pipe) == SUBVP_PHANTOM) {

			subvp_curr_use = true;

			break;

		}
@@ -4019,7 +3926,7 @@ static bool could_mpcc_tree_change_for_active_pipes(struct dc *dc, 
	for (i = 0; i < dc->res_pool->pipe_count; i++) {

		struct pipe_ctx *pipe = &dc->current_state->res_ctx.pipe_ctx[i];



		if (pipe->stream && pipe->stream->mall_stream_config.type != SUBVP_NONE) {

		if (dc_state_get_pipe_subvp_type(dc->current_state, pipe) != SUBVP_NONE) {

			subvp_active = true;

			break;

		}
@@ -4056,7 +3963,7 @@ struct pipe_split_policy_backup { 
static void release_minimal_transition_state(struct dc *dc,

		struct dc_state *context, struct pipe_split_policy_backup *policy)

{

	dc_release_state(context);

	dc_state_release(context);

	/* restore previous pipe split and odm policy */

	if (!dc->config.is_vmin_only_asic)

		dc->debug.pipe_split_policy = policy->mpc_policy;
@@ -4067,7 +3974,7 @@ static void release_minimal_transition_state(struct dc *dc, 
static struct dc_state *create_minimal_transition_state(struct dc *dc,

		struct dc_state *base_context, struct pipe_split_policy_backup *policy)

{

	struct dc_state *minimal_transition_context = dc_create_state(dc);

	struct dc_state *minimal_transition_context = dc_state_create(dc);

	unsigned int i, j;



	if (!dc->config.is_vmin_only_asic) {
@@ -4211,7 +4118,7 @@ static bool commit_minimal_transition_state(struct dc *dc, 
	for (i = 0; i < dc->res_pool->pipe_count; i++) {

		struct pipe_ctx *pipe = &dc->current_state->res_ctx.pipe_ctx[i];



		if (pipe->stream && pipe->stream->mall_stream_config.type == SUBVP_PHANTOM) {

		if (pipe->stream && dc_state_get_pipe_subvp_type(dc->current_state, pipe) == SUBVP_PHANTOM) {

			subvp_in_use = true;

			break;

		}
@@ -4523,7 +4430,7 @@ bool dc_update_planes_and_stream(struct dc *dc, 
		if (dc->res_pool->funcs->save_mall_state)

			dc->res_pool->funcs->save_mall_state(dc, context, &mall_temp_config);

		if (!commit_minimal_transition_state(dc, context)) {

			dc_release_state(context);

			dc_state_release(context);

			return false;

		}

		if (dc->res_pool->funcs->restore_mall_state)
@@ -4593,7 +4500,7 @@ bool dc_update_planes_and_stream(struct dc *dc, 
		struct dc_state *old = dc->current_state;



		dc->current_state = context;

		dc_release_state(old);

		dc_state_release(old);



		// clear any forced full updates

		for (i = 0; i < dc->res_pool->pipe_count; i++) {
@@ -4652,7 +4559,7 @@ void dc_commit_updates_for_stream(struct dc *dc, 
	if (update_type >= UPDATE_TYPE_FULL) {



		/* initialize scratch memory for building context */

		context = dc_create_state(dc);

		context = dc_state_create(dc);

		if (context == NULL) {

			DC_ERROR("Failed to allocate new validate context!\n");

			return;
@@ -4698,7 +4605,7 @@ void dc_commit_updates_for_stream(struct dc *dc, 
	if (update_type >= UPDATE_TYPE_FULL) {

		if (!dc->res_pool->funcs->validate_bandwidth(dc, context, false)) {

			DC_ERROR("Mode validation failed for stream update!\n");

			dc_release_state(context);

			dc_state_release(context);

			return;

		}

	}
@@ -4731,7 +4638,7 @@ void dc_commit_updates_for_stream(struct dc *dc, 
		struct dc_state *old = dc->current_state;



		dc->current_state = context;

		dc_release_state(old);

		dc_state_release(old);



		for (i = 0; i < dc->res_pool->pipe_count; i++) {

			struct pipe_ctx *pipe_ctx = &context->res_ctx.pipe_ctx[i];

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

+4 −4
Original line number Diff line number Diff line
@@ -31,6 +31,7 @@ 
#include "basics/dc_common.h"

#include "resource.h"

#include "dc_dmub_srv.h"

#include "dc_state_priv.h"



#define NUM_ELEMENTS(a) (sizeof(a) / sizeof((a)[0]))
@@ -440,8 +441,7 @@ void get_subvp_visual_confirm_color( 
	for (i = 0; i < dc->res_pool->pipe_count; i++) {

		struct pipe_ctx *pipe = &context->res_ctx.pipe_ctx[i];



		if (pipe->stream && pipe->stream->mall_stream_config.paired_stream &&

		    pipe->stream->mall_stream_config.type == SUBVP_MAIN) {

		if (dc_state_get_pipe_subvp_type(context, pipe) == SUBVP_MAIN) {

			/* SubVP enable - red */

			color->color_g_y = 0;

			color->color_b_cb = 0;
@@ -454,7 +454,7 @@ void get_subvp_visual_confirm_color( 
		}

	}



	if (enable_subvp && pipe_ctx->stream->mall_stream_config.type == SUBVP_NONE) {

	if (enable_subvp && dc_state_get_pipe_subvp_type(context, pipe_ctx) == SUBVP_NONE) {

		color->color_r_cr = 0;

		if (pipe_ctx->stream->allow_freesync == 1) {

			/* SubVP enable and DRR on - green */
@@ -529,7 +529,7 @@ void hwss_build_fast_sequence(struct dc *dc, 
			}

			if (dc->hwss.update_plane_addr && current_mpc_pipe->plane_state->update_flags.bits.addr_update) {

				if (resource_is_pipe_type(current_mpc_pipe, OTG_MASTER) &&

						current_mpc_pipe->stream->mall_stream_config.type == SUBVP_MAIN) {

						dc_state_get_pipe_subvp_type(NULL, pipe_ctx) == SUBVP_MAIN) {

					block_sequence[*num_steps].params.subvp_save_surf_addr.dc_dmub_srv = dc->ctx->dmub_srv;

					block_sequence[*num_steps].params.subvp_save_surf_addr.addr = &current_mpc_pipe->plane_state->address;

					block_sequence[*num_steps].params.subvp_save_surf_addr.subvp_index = current_mpc_pipe->subvp_index;