Commit 09b003ad authored by He Lugang's avatar He Lugang Committed by Jani Nikula
Browse files

drm/i915:Remove unused parameter in marco 



The parameter dev_priv is actually not used in macro PORT_ALPM_CTL
and PORT_ALPM_LFPS_CTL,so remove it to simplify the code.

Reviewed-by: default avatarJani Nikula <jani.nikula@linux.intel.com>
Signed-off-by: default avatarHe Lugang <helugang@uniontech.com>
Link: https://patchwork.freedesktop.org/patch/msgid/6C2E07E089F0CB73+20240925064016.733173-1-helugang@uniontech.com


Signed-off-by: default avatarJani Nikula <jani.nikula@intel.com>
parent 0ca97fcd

drivers/gpu/drm/i915/display/intel_alpm.c

+2 −2
Original line number Diff line number Diff line
@@ -332,7 +332,7 @@ static void lnl_alpm_configure(struct intel_dp *intel_dp, 
			ALPM_CTL_AUX_LESS_WAKE_TIME(intel_dp->alpm_parameters.aux_less_wake_lines);



		intel_de_write(display,

			       PORT_ALPM_CTL(display, port),

			       PORT_ALPM_CTL(port),

			       PORT_ALPM_CTL_ALPM_AUX_LESS_ENABLE |

			       PORT_ALPM_CTL_MAX_PHY_SWING_SETUP(15) |

			       PORT_ALPM_CTL_MAX_PHY_SWING_HOLD(0) |
@@ -340,7 +340,7 @@ static void lnl_alpm_configure(struct intel_dp *intel_dp, 
				       intel_dp->alpm_parameters.silence_period_sym_clocks));



		intel_de_write(display,

			       PORT_ALPM_LFPS_CTL(display, port),

			       PORT_ALPM_LFPS_CTL(port),

			       PORT_ALPM_LFPS_CTL_LFPS_CYCLE_COUNT(10) |

			       PORT_ALPM_LFPS_CTL_LFPS_HALF_CYCLE_DURATION(

				       intel_dp->alpm_parameters.lfps_half_cycle_num_of_syms) |

drivers/gpu/drm/i915/display/intel_psr.c

+1 −1
Original line number Diff line number Diff line
@@ -2123,7 +2123,7 @@ static void intel_psr_disable_locked(struct intel_dp *intel_dp) 
			     ALPM_CTL_ALPM_AUX_LESS_ENABLE, 0);



		intel_de_rmw(display,

			     PORT_ALPM_CTL(display, cpu_transcoder),

			     PORT_ALPM_CTL(cpu_transcoder),

			     PORT_ALPM_CTL_ALPM_AUX_LESS_ENABLE, 0);

	}

drivers/gpu/drm/i915/display/intel_psr_regs.h

+2 −2
Original line number Diff line number Diff line
@@ -296,7 +296,7 @@ 


#define _PORT_ALPM_CTL_A			0x16fa2c

#define _PORT_ALPM_CTL_B			0x16fc2c

#define PORT_ALPM_CTL(dev_priv, port)		_MMIO_PORT(port, _PORT_ALPM_CTL_A, _PORT_ALPM_CTL_B)

#define PORT_ALPM_CTL(port)			_MMIO_PORT(port, _PORT_ALPM_CTL_A, _PORT_ALPM_CTL_B)

#define  PORT_ALPM_CTL_ALPM_AUX_LESS_ENABLE	REG_BIT(31)

#define  PORT_ALPM_CTL_MAX_PHY_SWING_SETUP_MASK	REG_GENMASK(23, 20)

#define  PORT_ALPM_CTL_MAX_PHY_SWING_SETUP(val)	REG_FIELD_PREP(PORT_ALPM_CTL_MAX_PHY_SWING_SETUP_MASK, val)
@@ -307,7 +307,7 @@ 


#define _PORT_ALPM_LFPS_CTL_A					0x16fa30

#define _PORT_ALPM_LFPS_CTL_B					0x16fc30

#define PORT_ALPM_LFPS_CTL(dev_priv, port)			_MMIO_PORT(port, _PORT_ALPM_LFPS_CTL_A, _PORT_ALPM_LFPS_CTL_B)

#define PORT_ALPM_LFPS_CTL(port)				_MMIO_PORT(port, _PORT_ALPM_LFPS_CTL_A, _PORT_ALPM_LFPS_CTL_B)

#define  PORT_ALPM_LFPS_CTL_LFPS_START_POLARITY			REG_BIT(31)

#define  PORT_ALPM_LFPS_CTL_LFPS_CYCLE_COUNT_MASK		REG_GENMASK(27, 24)

#define  PORT_ALPM_LFPS_CTL_LFPS_CYCLE_COUNT_MIN		7