Commit 09b45fd9 authored by Michal Wajdeczko's avatar Michal Wajdeczko
Browse files

drm/xe/guc: Drop redundant register read 



The xe_mmio_wait32() already returns the last value of the register
for which we were waiting, there is no need read it again.

Signed-off-by: default avatarMichal Wajdeczko <michal.wajdeczko@intel.com>
Reviewed-by: default avatarMatthew Brost <matthew.brost@intel.com>
Link: https://patch.msgid.link/20260127193727.601-5-michal.wajdeczko@intel.com
parent 943c4d06

drivers/gpu/drm/xe/xe_guc.c

+4 −5
Original line number Diff line number Diff line
@@ -1405,11 +1405,11 @@ int xe_guc_mmio_send_recv(struct xe_guc *guc, const u32 *request, 
	struct xe_device *xe = guc_to_xe(guc);

	struct xe_gt *gt = guc_to_gt(guc);

	struct xe_mmio *mmio = &gt->mmio;

	u32 header, reply;

	struct xe_reg reply_reg = xe_gt_is_media_type(gt) ?

		MED_VF_SW_FLAG(0) : VF_SW_FLAG(0);

	const u32 LAST_INDEX = VF_SW_FLAG_COUNT - 1;

	bool lost = false;

	u32 header;

	int ret;

	int i;
@@ -1441,21 +1441,20 @@ int xe_guc_mmio_send_recv(struct xe_guc *guc, const u32 *request, 


	ret = xe_mmio_wait32(mmio, reply_reg, GUC_HXG_MSG_0_ORIGIN,

			     FIELD_PREP(GUC_HXG_MSG_0_ORIGIN, GUC_HXG_ORIGIN_GUC),

			     50000, &reply, false);

			     50000, &header, false);

	if (ret) {

		/* scratch registers might be cleared during FLR, try once more */

		if (!reply && !lost) {

		if (!header && !lost) {

			xe_gt_dbg(gt, "GuC mmio request %#x: lost, trying again\n", request[0]);

			lost = true;

			goto retry;

		}

timeout:

		xe_gt_err(gt, "GuC mmio request %#x: no reply %#x\n",

			  request[0], reply);

			  request[0], header);

		return ret;

	}



	header = xe_mmio_read32(mmio, reply_reg);

	if (FIELD_GET(GUC_HXG_MSG_0_TYPE, header) ==

	    GUC_HXG_TYPE_NO_RESPONSE_BUSY) {

		/*