Commit 0a0ea554 authored by Alexey Minnekhanov's avatar Alexey Minnekhanov Committed by Bjorn Andersson
Browse files

clk: qcom: mmcc-sdm660: Add missing MDSS reset 



Add offset for display subsystem reset in multimedia clock controller
block, which is necessary to reset display when there is some
configuration in display controller left by previous stock (Android)
bootloader to provide continuous splash functionaluty.

Before 6.17 power domains were turned off for long enough to clear
registers, now this is not the case and a proper reset is needed to
have functioning display.

Fixes: 0e789b49 ("pmdomain: core: Leave powered-on genpds on until sync_state")
Cc: stable@vger.kernel.org # 6.17
Signed-off-by: default avatarAlexey Minnekhanov <alexeymin@postmarketos.org>
Reviewed-by: default avatarTaniya Das <taniya.das@oss.qualcomm.com>
Reviewed-by: default avatarDmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20251116-sdm660-mdss-reset-v2-2-6219bec0a97f@postmarketos.org


Signed-off-by: default avatarBjorn Andersson <andersson@kernel.org>
parent c57210bc

drivers/clk/qcom/mmcc-sdm660.c

+1 −0
Original line number Diff line number Diff line
@@ -2781,6 +2781,7 @@ static struct gdsc *mmcc_sdm660_gdscs[] = { 
};



static const struct qcom_reset_map mmcc_660_resets[] = {

	[MDSS_BCR] = { 0x2300 },

	[CAMSS_MICRO_BCR] = { 0x3490 },

};