Commit 0a35bd28 authored by Marc Zyngier's avatar Marc Zyngier
Browse files

arm64: Convert SCTLR_EL2 to sysreg infrastructure 



Convert SCTLR_EL2 to the sysreg infrastructure, as per the 2025-12_rel
revision of the Registers.json file.

Note that we slightly deviate from the above, as we stick to the ARM
ARM M.a definition of SCTLR_EL2[9], which is RES0, in order to avoid
dragging the POE2 definitions...

Reviewed-by: default avatarFuad Tabba <tabba@google.com>
Tested-by: default avatarFuad Tabba <tabba@google.com>
Link: https://patch.msgid.link/20260202184329.2724080-2-maz@kernel.org


Signed-off-by: default avatarMarc Zyngier <maz@kernel.org>
parent 2eb80a2e

arch/arm64/include/asm/sysreg.h

+0 −7
Original line number Diff line number Diff line
@@ -504,7 +504,6 @@ 
#define SYS_VPIDR_EL2			sys_reg(3, 4, 0, 0, 0)

#define SYS_VMPIDR_EL2			sys_reg(3, 4, 0, 0, 5)



#define SYS_SCTLR_EL2			sys_reg(3, 4, 1, 0, 0)

#define SYS_ACTLR_EL2			sys_reg(3, 4, 1, 0, 1)

#define SYS_SCTLR2_EL2			sys_reg(3, 4, 1, 0, 3)

#define SYS_HCR_EL2			sys_reg(3, 4, 1, 1, 0)
@@ -837,12 +836,6 @@ 
#define SCTLR_ELx_A	 (BIT(1))

#define SCTLR_ELx_M	 (BIT(0))



/* SCTLR_EL2 specific flags. */

#define SCTLR_EL2_RES1	((BIT(4))  | (BIT(5))  | (BIT(11)) | (BIT(16)) | \

			 (BIT(18)) | (BIT(22)) | (BIT(23)) | (BIT(28)) | \

			 (BIT(29)))



#define SCTLR_EL2_BT	(BIT(36))

#ifdef CONFIG_CPU_BIG_ENDIAN

#define ENDIAN_SET_EL2		SCTLR_ELx_EE

#else

arch/arm64/tools/sysreg

+69 −0
Original line number Diff line number Diff line
@@ -3749,6 +3749,75 @@ UnsignedEnum 2:0 F8S1 
EndEnum

EndSysreg



Sysreg	SCTLR_EL2	3	4	1	0	0

Field	63	TIDCP

Field	62	SPINTMASK

Field	61	NMI

Field	60	EnTP2

Field	59	TCSO

Field	58	TCSO0

Field	57	EPAN

Field	56	EnALS

Field	55	EnAS0

Field	54	EnASR

Res0	53:50

Field	49:46	TWEDEL

Field	45	TWEDEn

Field	44	DSSBS

Field	43	ATA

Field	42	ATA0

Enum	41:40	TCF

	0b00	NONE

	0b01	SYNC

	0b10	ASYNC

	0b11	ASYMM

EndEnum

Enum	39:38	TCF0

	0b00	NONE

	0b01	SYNC

	0b10	ASYNC

	0b11	ASYMM

EndEnum

Field	37	ITFSB

Field	36	BT

Field	35	BT0

Field	34	EnFPM

Field	33	MSCEn

Field	32	CMOW

Field	31	EnIA

Field	30	EnIB

Field	29	LSMAOE

Field	28	nTLSMD

Field	27	EnDA

Field	26	UCI

Field	25	EE

Field	24	E0E

Field	23	SPAN

Field	22	EIS

Field	21	IESB

Field	20	TSCXT

Field	19	WXN

Field	18	nTWE

Res0	17

Field	16	nTWI

Field	15	UCT

Field	14	DZE

Field	13	EnDB

Field	12	I

Field	11	EOS

Field	10	EnRCTX

Res0	9

Field	8	SED

Field	7	ITD

Field	6	nAA

Field	5	CP15BEN

Field	4	SA0

Field	3	SA

Field	2	C

Field	1	A

Field	0	M

EndSysreg



Sysreg	HCR_EL2		3	4	1	1	0

Field	63:60	TWEDEL

Field	59	TWEDEn

tools/arch/arm64/include/asm/sysreg.h

+0 −6
Original line number Diff line number Diff line
@@ -847,12 +847,6 @@ 
#define SCTLR_ELx_A	 (BIT(1))

#define SCTLR_ELx_M	 (BIT(0))



/* SCTLR_EL2 specific flags. */

#define SCTLR_EL2_RES1	((BIT(4))  | (BIT(5))  | (BIT(11)) | (BIT(16)) | \

			 (BIT(18)) | (BIT(22)) | (BIT(23)) | (BIT(28)) | \

			 (BIT(29)))



#define SCTLR_EL2_BT	(BIT(36))

#ifdef CONFIG_CPU_BIG_ENDIAN

#define ENDIAN_SET_EL2		SCTLR_ELx_EE

#else