Commit 0a64c447 authored by Sean Christopherson's avatar Sean Christopherson
Browse files

KVM: SVM: Extract SVM specific code out of get_pi_vcpu_info() 



Genericize SVM's get_pi_vcpu_info() so that it can be shared with VMX.
The only SVM specific information it provides is the AVIC back page, and
that can be trivially retrieved by its sole caller.

No functional change intended.

Cc: Francesco Lavra <francescolavra.fl@gmail.com>
Tested-by: default avatarSairaj Kodilkar <sarunkod@amd.com>
Link: https://lore.kernel.org/r/20250611224604.313496-27-seanjc@google.com


Signed-off-by: default avatarSean Christopherson <seanjc@google.com>
parent 23ca102e

arch/x86/kvm/svm/avic.c

+12 −13
Original line number Diff line number Diff line
@@ -817,14 +817,14 @@ static int svm_ir_list_add(struct vcpu_svm *svm, 
 */

static int

get_pi_vcpu_info(struct kvm *kvm, struct kvm_kernel_irq_routing_entry *e,

		 struct vcpu_data *vcpu_info, struct vcpu_svm **svm)

		 struct vcpu_data *vcpu_info, struct kvm_vcpu **vcpu)

{

	struct kvm_lapic_irq irq;

	struct kvm_vcpu *vcpu = NULL;

	*vcpu = NULL;



	kvm_set_msi_irq(kvm, e, &irq);



	if (!kvm_intr_is_single_vcpu(kvm, &irq, &vcpu) ||

	if (!kvm_intr_is_single_vcpu(kvm, &irq, vcpu) ||

	    !kvm_irq_is_postable(&irq)) {

		pr_debug("SVM: %s: use legacy intr remap mode for irq %u\n",

			 __func__, irq.vector);
@@ -833,8 +833,6 @@ get_pi_vcpu_info(struct kvm *kvm, struct kvm_kernel_irq_routing_entry *e, 


	pr_debug("SVM: %s: use GA mode for irq %u\n", __func__,

		 irq.vector);

	*svm = to_svm(vcpu);

	vcpu_info->pi_desc_addr = avic_get_backing_page_address(*svm);

	vcpu_info->vector = irq.vector;



	return 0;
@@ -846,7 +844,7 @@ int avic_pi_update_irte(struct kvm_kernel_irqfd *irqfd, struct kvm *kvm, 
{

	bool enable_remapped_mode = true;

	struct vcpu_data vcpu_info;

	struct vcpu_svm *svm = NULL;

	struct kvm_vcpu *vcpu = NULL;

	int ret = 0;



	if (!kvm_arch_has_assigned_device(kvm) || !kvm_arch_has_irq_bypass())
@@ -869,19 +867,20 @@ int avic_pi_update_irte(struct kvm_kernel_irqfd *irqfd, struct kvm *kvm, 
	 * 4. IRQ has incompatible delivery mode (SMI, INIT, etc)

	 */

	if (new && new->type == KVM_IRQ_ROUTING_MSI &&

	    !get_pi_vcpu_info(kvm, new, &vcpu_info, &svm) &&

	    kvm_vcpu_apicv_active(&svm->vcpu)) {

	    !get_pi_vcpu_info(kvm, new, &vcpu_info, &vcpu) &&

	    kvm_vcpu_apicv_active(vcpu)) {

		struct amd_iommu_pi_data pi;



		enable_remapped_mode = false;



		vcpu_info.pi_desc_addr = avic_get_backing_page_address(to_svm(vcpu));



		/*

		 * Try to enable guest_mode in IRTE.  Note, the address

		 * of the vCPU's AVIC backing page is passed to the

		 * IOMMU via vcpu_info->pi_desc_addr.

		 */

		pi.ga_tag = AVIC_GATAG(to_kvm_svm(kvm)->avic_vm_id,

					     svm->vcpu.vcpu_id);

		pi.ga_tag = AVIC_GATAG(to_kvm_svm(kvm)->avic_vm_id, vcpu->vcpu_id);

		pi.is_guest_mode = true;

		pi.vcpu_data = &vcpu_info;

		ret = irq_set_vcpu_affinity(host_irq, &pi);
@@ -894,11 +893,11 @@ int avic_pi_update_irte(struct kvm_kernel_irqfd *irqfd, struct kvm *kvm, 
		 * scheduling information in IOMMU irte.

		 */

		if (!ret)

			ret = svm_ir_list_add(svm, irqfd, &pi);

			ret = svm_ir_list_add(to_svm(vcpu), irqfd, &pi);

	}



	if (!ret && svm) {

		trace_kvm_pi_irte_update(host_irq, svm->vcpu.vcpu_id,

	if (!ret && vcpu) {

		trace_kvm_pi_irte_update(host_irq, vcpu->vcpu_id,

					 guest_irq, vcpu_info.vector,

					 vcpu_info.pi_desc_addr, !!new);

	}