Commit 0ad4b4a2 authored Jun 26, 2024 by Roman Li Committed by Alex Deucher Jul 01, 2024

drm/amd/display: Fix array-index-out-of-bounds in dml2/FCLKChangeSupport



[Why]
Potential out of bounds access in dml2_calculate_rq_and_dlg_params()
because the value of out_lowest_state_idx used as an index for FCLKChangeSupport
array can be greater than 1.

[How]
Currently dml2 core specifies identical values for all FCLKChangeSupport
elements. Always use index 0 in the condition to avoid out of bounds access.

Acked-by: Rodrigo Siqueira <rodrigo.siqueira@amd.com>
Signed-off-by: Jerry Zuo <jerry.zuo@amd.com>
Signed-off-by: Roman Li <Roman.Li@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

parent 7ae37db2

drivers/gpu/drm/amd/display/dc/dml2/dml2_utils.c

+1 −1

Original line number	Diff line number	Diff line
		@@ -294,7 +294,7 @@ void dml2_calculate_rq_and_dlg_params(const struct dc dc, struct dc_state cont
		context->bw_ctx.bw.dcn.clk.dcfclk_deep_sleep_khz = (unsigned int)in_ctx->v20.dml_core_ctx.mp.DCFCLKDeepSleep * 1000;
		context->bw_ctx.bw.dcn.clk.dppclk_khz = 0;

		if (in_ctx->v20.dml_core_ctx.ms.support.FCLKChangeSupport[in_ctx->v20.scratch.mode_support_params.out_lowest_state_idx] == dml_fclock_change_unsupported)
		if (in_ctx->v20.dml_core_ctx.ms.support.FCLKChangeSupport[0] == dml_fclock_change_unsupported)
		context->bw_ctx.bw.dcn.clk.fclk_p_state_change_support = false;
		else
		context->bw_ctx.bw.dcn.clk.fclk_p_state_change_support = true;