Commit 0afce85e authored by Krzysztof Kozlowski's avatar Krzysztof Kozlowski Committed by Jerome Brunet
Browse files

clk: meson: Do not enable by default during compile testing 



Enabling the compile test should not cause automatic enabling of all
drivers.

Signed-off-by: default avatarKrzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: default avatarMartin Blumenstingl <martin.blumenstingl@googlemail.com>
Link: https://lore.kernel.org/r/20250404-kconfig-defaults-clk-v1-1-4d2df5603332@linaro.org


Signed-off-by: default avatarJerome Brunet <jbrunet@baylibre.com>
parent daf004f8

drivers/clk/meson/Kconfig

+8 −8
Original line number Diff line number Diff line
@@ -55,7 +55,7 @@ config COMMON_CLK_MESON_CPU_DYNDIV 
config COMMON_CLK_MESON8B

	bool "Meson8 SoC Clock controller support"

	depends on ARM

	default y

	default ARCH_MESON

	select COMMON_CLK_MESON_REGMAP

	select COMMON_CLK_MESON_CLKC_UTILS

	select COMMON_CLK_MESON_MPLL
@@ -70,7 +70,7 @@ config COMMON_CLK_MESON8B 
config COMMON_CLK_GXBB

	tristate "GXBB and GXL SoC clock controllers support"

	depends on ARM64

	default y

	default ARCH_MESON

	select COMMON_CLK_MESON_REGMAP

	select COMMON_CLK_MESON_DUALDIV

	select COMMON_CLK_MESON_VID_PLL_DIV
@@ -86,7 +86,7 @@ config COMMON_CLK_GXBB 
config COMMON_CLK_AXG

	tristate "AXG SoC clock controllers support"

	depends on ARM64

	default y

	default ARCH_MESON

	select COMMON_CLK_MESON_REGMAP

	select COMMON_CLK_MESON_DUALDIV

	select COMMON_CLK_MESON_MPLL
@@ -136,7 +136,7 @@ config COMMON_CLK_A1_PERIPHERALS 
config COMMON_CLK_C3_PLL

	tristate "Amlogic C3 PLL clock controller"

	depends on ARM64

	default y

	default ARCH_MESON

	select COMMON_CLK_MESON_REGMAP

	select COMMON_CLK_MESON_PLL

	select COMMON_CLK_MESON_CLKC_UTILS
@@ -149,7 +149,7 @@ config COMMON_CLK_C3_PLL 
config COMMON_CLK_C3_PERIPHERALS

	tristate "Amlogic C3 peripherals clock controller"

	depends on ARM64

	default y

	default ARCH_MESON

	select COMMON_CLK_MESON_REGMAP

	select COMMON_CLK_MESON_DUALDIV

	select COMMON_CLK_MESON_CLKC_UTILS
@@ -163,7 +163,7 @@ config COMMON_CLK_C3_PERIPHERALS 
config COMMON_CLK_G12A

	tristate "G12 and SM1 SoC clock controllers support"

	depends on ARM64

	default y

	default ARCH_MESON

	select COMMON_CLK_MESON_REGMAP

	select COMMON_CLK_MESON_DUALDIV

	select COMMON_CLK_MESON_MPLL
@@ -181,7 +181,7 @@ config COMMON_CLK_G12A 
config COMMON_CLK_S4_PLL

	tristate "S4 SoC PLL clock controllers support"

	depends on ARM64

	default y

	default ARCH_MESON

	select COMMON_CLK_MESON_CLKC_UTILS

	select COMMON_CLK_MESON_MPLL

	select COMMON_CLK_MESON_PLL
@@ -194,7 +194,7 @@ config COMMON_CLK_S4_PLL 
config COMMON_CLK_S4_PERIPHERALS

	tristate "S4 SoC peripherals clock controllers support"

	depends on ARM64

	default y

	default ARCH_MESON

	select COMMON_CLK_MESON_CLKC_UTILS

	select COMMON_CLK_MESON_REGMAP

	select COMMON_CLK_MESON_DUALDIV