Unverified Commit 0be88982 authored by Chen-Yu Tsai's avatar Chen-Yu Tsai Committed by Mark Brown
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ASoC: mediatek: mt8183-afe-pcm: Shorten irq_data table using macros 



The irq_data table describes all the supported interrupts for the audio
frontend. The parameters are either the same or can be derived from the
interrupt number. This results in a very long table (in source code)
that can be shortened with macros.

Do just that.

Signed-off-by: default avatarChen-Yu Tsai <wenst@chromium.org>
Reviewed-by: default avatarAngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://patch.msgid.link/20250515073825.4155297-3-wenst@chromium.org


Signed-off-by: default avatarMark Brown <broonie@kernel.org>
parent 91c26854

sound/soc/mediatek/mt8183/mt8183-afe-pcm.c

+33 −143
Original line number Diff line number Diff line
@@ -481,150 +481,40 @@ static const struct mtk_base_memif_data memif_data[MT8183_MEMIF_NUM] = { 
	MT8183_MEMIF_BASE(HDMI, -1, -1, -1),

};



#define MT8183_AFE_IRQ_BASE(_id, _fs_reg, _fs_shift, _fs_maskbit)	\

	[MT8183_IRQ_##_id] = {	\

		.id = MT8183_IRQ_##_id,			\

		.irq_cnt_reg = AFE_IRQ_MCU_CNT##_id,	\

		.irq_cnt_shift = 0,			\

		.irq_cnt_maskbit = 0x3ffff,		\

		.irq_fs_reg = _fs_reg,			\

		.irq_fs_shift = _fs_shift,		\

		.irq_fs_maskbit = _fs_maskbit,		\

		.irq_en_reg = AFE_IRQ_MCU_CON0,		\

		.irq_en_shift = IRQ##_id##_MCU_ON_SFT,	\

		.irq_clr_reg = AFE_IRQ_MCU_CLR,		\

		.irq_clr_shift = IRQ##_id##_MCU_CLR_SFT,	\

	}



#define MT8183_AFE_IRQ(_id) \

	MT8183_AFE_IRQ_BASE(_id, AFE_IRQ_MCU_CON1 + _id / 8 * 4,	\

			    IRQ##_id##_MCU_MODE_SFT,	\

			    IRQ##_id##_MCU_MODE_MASK)



#define MT8183_AFE_IRQ_NOFS(_id) MT8183_AFE_IRQ_BASE(_id, -1, -1, -1)



static const struct mtk_base_irq_data irq_data[MT8183_IRQ_NUM] = {

	[MT8183_IRQ_0] = {

		.id = MT8183_IRQ_0,

		.irq_cnt_reg = AFE_IRQ_MCU_CNT0,

		.irq_cnt_shift = 0,

		.irq_cnt_maskbit = 0x3ffff,

		.irq_fs_reg = AFE_IRQ_MCU_CON1,

		.irq_fs_shift = IRQ0_MCU_MODE_SFT,

		.irq_fs_maskbit = IRQ0_MCU_MODE_MASK,

		.irq_en_reg = AFE_IRQ_MCU_CON0,

		.irq_en_shift = IRQ0_MCU_ON_SFT,

		.irq_clr_reg = AFE_IRQ_MCU_CLR,

		.irq_clr_shift = IRQ0_MCU_CLR_SFT,

	},

	[MT8183_IRQ_1] = {

		.id = MT8183_IRQ_1,

		.irq_cnt_reg = AFE_IRQ_MCU_CNT1,

		.irq_cnt_shift = 0,

		.irq_cnt_maskbit = 0x3ffff,

		.irq_fs_reg = AFE_IRQ_MCU_CON1,

		.irq_fs_shift = IRQ1_MCU_MODE_SFT,

		.irq_fs_maskbit = IRQ1_MCU_MODE_MASK,

		.irq_en_reg = AFE_IRQ_MCU_CON0,

		.irq_en_shift = IRQ1_MCU_ON_SFT,

		.irq_clr_reg = AFE_IRQ_MCU_CLR,

		.irq_clr_shift = IRQ1_MCU_CLR_SFT,

	},

	[MT8183_IRQ_2] = {

		.id = MT8183_IRQ_2,

		.irq_cnt_reg = AFE_IRQ_MCU_CNT2,

		.irq_cnt_shift = 0,

		.irq_cnt_maskbit = 0x3ffff,

		.irq_fs_reg = AFE_IRQ_MCU_CON1,

		.irq_fs_shift = IRQ2_MCU_MODE_SFT,

		.irq_fs_maskbit = IRQ2_MCU_MODE_MASK,

		.irq_en_reg = AFE_IRQ_MCU_CON0,

		.irq_en_shift = IRQ2_MCU_ON_SFT,

		.irq_clr_reg = AFE_IRQ_MCU_CLR,

		.irq_clr_shift = IRQ2_MCU_CLR_SFT,

	},

	[MT8183_IRQ_3] = {

		.id = MT8183_IRQ_3,

		.irq_cnt_reg = AFE_IRQ_MCU_CNT3,

		.irq_cnt_shift = 0,

		.irq_cnt_maskbit = 0x3ffff,

		.irq_fs_reg = AFE_IRQ_MCU_CON1,

		.irq_fs_shift = IRQ3_MCU_MODE_SFT,

		.irq_fs_maskbit = IRQ3_MCU_MODE_MASK,

		.irq_en_reg = AFE_IRQ_MCU_CON0,

		.irq_en_shift = IRQ3_MCU_ON_SFT,

		.irq_clr_reg = AFE_IRQ_MCU_CLR,

		.irq_clr_shift = IRQ3_MCU_CLR_SFT,

	},

	[MT8183_IRQ_4] = {

		.id = MT8183_IRQ_4,

		.irq_cnt_reg = AFE_IRQ_MCU_CNT4,

		.irq_cnt_shift = 0,

		.irq_cnt_maskbit = 0x3ffff,

		.irq_fs_reg = AFE_IRQ_MCU_CON1,

		.irq_fs_shift = IRQ4_MCU_MODE_SFT,

		.irq_fs_maskbit = IRQ4_MCU_MODE_MASK,

		.irq_en_reg = AFE_IRQ_MCU_CON0,

		.irq_en_shift = IRQ4_MCU_ON_SFT,

		.irq_clr_reg = AFE_IRQ_MCU_CLR,

		.irq_clr_shift = IRQ4_MCU_CLR_SFT,

	},

	[MT8183_IRQ_5] = {

		.id = MT8183_IRQ_5,

		.irq_cnt_reg = AFE_IRQ_MCU_CNT5,

		.irq_cnt_shift = 0,

		.irq_cnt_maskbit = 0x3ffff,

		.irq_fs_reg = AFE_IRQ_MCU_CON1,

		.irq_fs_shift = IRQ5_MCU_MODE_SFT,

		.irq_fs_maskbit = IRQ5_MCU_MODE_MASK,

		.irq_en_reg = AFE_IRQ_MCU_CON0,

		.irq_en_shift = IRQ5_MCU_ON_SFT,

		.irq_clr_reg = AFE_IRQ_MCU_CLR,

		.irq_clr_shift = IRQ5_MCU_CLR_SFT,

	},

	[MT8183_IRQ_6] = {

		.id = MT8183_IRQ_6,

		.irq_cnt_reg = AFE_IRQ_MCU_CNT6,

		.irq_cnt_shift = 0,

		.irq_cnt_maskbit = 0x3ffff,

		.irq_fs_reg = AFE_IRQ_MCU_CON1,

		.irq_fs_shift = IRQ6_MCU_MODE_SFT,

		.irq_fs_maskbit = IRQ6_MCU_MODE_MASK,

		.irq_en_reg = AFE_IRQ_MCU_CON0,

		.irq_en_shift = IRQ6_MCU_ON_SFT,

		.irq_clr_reg = AFE_IRQ_MCU_CLR,

		.irq_clr_shift = IRQ6_MCU_CLR_SFT,

	},

	[MT8183_IRQ_7] = {

		.id = MT8183_IRQ_7,

		.irq_cnt_reg = AFE_IRQ_MCU_CNT7,

		.irq_cnt_shift = 0,

		.irq_cnt_maskbit = 0x3ffff,

		.irq_fs_reg = AFE_IRQ_MCU_CON1,

		.irq_fs_shift = IRQ7_MCU_MODE_SFT,

		.irq_fs_maskbit = IRQ7_MCU_MODE_MASK,

		.irq_en_reg = AFE_IRQ_MCU_CON0,

		.irq_en_shift = IRQ7_MCU_ON_SFT,

		.irq_clr_reg = AFE_IRQ_MCU_CLR,

		.irq_clr_shift = IRQ7_MCU_CLR_SFT,

	},

	[MT8183_IRQ_8] = {

		.id = MT8183_IRQ_8,

		.irq_cnt_reg = AFE_IRQ_MCU_CNT8,

		.irq_cnt_shift = 0,

		.irq_cnt_maskbit = 0x3ffff,

		.irq_fs_reg = -1,

		.irq_fs_shift = -1,

		.irq_fs_maskbit = -1,

		.irq_en_reg = AFE_IRQ_MCU_CON0,

		.irq_en_shift = IRQ8_MCU_ON_SFT,

		.irq_clr_reg = AFE_IRQ_MCU_CLR,

		.irq_clr_shift = IRQ8_MCU_CLR_SFT,

	},

	[MT8183_IRQ_11] = {

		.id = MT8183_IRQ_11,

		.irq_cnt_reg = AFE_IRQ_MCU_CNT11,

		.irq_cnt_shift = 0,

		.irq_cnt_maskbit = 0x3ffff,

		.irq_fs_reg = AFE_IRQ_MCU_CON2,

		.irq_fs_shift = IRQ11_MCU_MODE_SFT,

		.irq_fs_maskbit = IRQ11_MCU_MODE_MASK,

		.irq_en_reg = AFE_IRQ_MCU_CON0,

		.irq_en_shift = IRQ11_MCU_ON_SFT,

		.irq_clr_reg = AFE_IRQ_MCU_CLR,

		.irq_clr_shift = IRQ11_MCU_CLR_SFT,

	},

	[MT8183_IRQ_12] = {

		.id = MT8183_IRQ_12,

		.irq_cnt_reg = AFE_IRQ_MCU_CNT12,

		.irq_cnt_shift = 0,

		.irq_cnt_maskbit = 0x3ffff,

		.irq_fs_reg = AFE_IRQ_MCU_CON2,

		.irq_fs_shift = IRQ12_MCU_MODE_SFT,

		.irq_fs_maskbit = IRQ12_MCU_MODE_MASK,

		.irq_en_reg = AFE_IRQ_MCU_CON0,

		.irq_en_shift = IRQ12_MCU_ON_SFT,

		.irq_clr_reg = AFE_IRQ_MCU_CLR,

		.irq_clr_shift = IRQ12_MCU_CLR_SFT,

	},

	MT8183_AFE_IRQ(0),

	MT8183_AFE_IRQ(1),

	MT8183_AFE_IRQ(2),

	MT8183_AFE_IRQ(3),

	MT8183_AFE_IRQ(4),

	MT8183_AFE_IRQ(5),

	MT8183_AFE_IRQ(6),

	MT8183_AFE_IRQ(7),

	MT8183_AFE_IRQ_NOFS(8),

	MT8183_AFE_IRQ(11),

	MT8183_AFE_IRQ(12),

};



static bool mt8183_is_volatile_reg(struct device *dev, unsigned int reg)