Commit 0c0af438 authored by Alyssa Rosenzweig's avatar Alyssa Rosenzweig
Browse files

drm/panfrost: Handle HW_ISSUE_TTRX_3076



Some Valhall GPUs require resets when encountering bus faults due to
occlusion query writes. Add the issue bit for this and handle it.

Reviewed-by: default avatarSteven Price <steven.price@arm.com>
Signed-off-by: default avatarAlyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220525145754.25866-5-alyssa.rosenzweig@collabora.com
parent a17775a1
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+7 −2
Original line number Diff line number Diff line
@@ -11,6 +11,7 @@
#include "panfrost_device.h"
#include "panfrost_devfreq.h"
#include "panfrost_features.h"
#include "panfrost_issues.h"
#include "panfrost_gpu.h"
#include "panfrost_job.h"
#include "panfrost_mmu.h"
@@ -380,9 +381,13 @@ const char *panfrost_exception_name(u32 exception_code)
bool panfrost_exception_needs_reset(const struct panfrost_device *pfdev,
				    u32 exception_code)
{
	/* Right now, none of the GPU we support need a reset, but this
	 * might change.
	/* If an occlusion query write causes a bus fault on affected GPUs,
	 * future fragment jobs may hang. Reset to workaround.
	 */
	if (exception_code == DRM_PANFROST_EXCEPTION_JOB_BUS_FAULT)
		return panfrost_has_hw_issue(pfdev, HW_ISSUE_TTRX_3076);

	/* No other GPUs we support need a reset */
	return false;
}

+4 −0
Original line number Diff line number Diff line
@@ -128,6 +128,10 @@ enum panfrost_hw_issue {
	/* Must set SC_VAR_ALGORITHM */
	HW_ISSUE_TTRX_2968_TTRX_3162,

	/* Bus fault from occlusion query write may cause future fragment jobs
	 * to hang */
	HW_ISSUE_TTRX_3076,

	HW_ISSUE_END
};