Commit 0c476157 authored by Oleksij Rempel's avatar Oleksij Rempel Committed by Jakub Kicinski
Browse files

net: phy: c45: add genphy_c45_pma_read_ext_abilities() function 



Move part of the genphy_c45_pma_read_abilities() code to a separate
function.

Some PHYs do not implement PMA/PMD status 2 register (Register 1.8) but
do implement PMA/PMD extended ability register (Register 1.11). To make
use of it, we need to be able to access this part of code separately.

Signed-off-by: default avatarOleksij Rempel <o.rempel@pengutronix.de>
Reviewed-by: default avatarAndrew Lunn <andrew@lunn.ch>
Reviewed-by: default avatarRussell King (Oracle) <rmk+kernel@armlinux.org.uk>
Link: https://lore.kernel.org/r/20231212054144.87527-2-o.rempel@pengutronix.de


Signed-off-by: default avatarJakub Kicinski <kuba@kernel.org>
parent a25ebbf3

drivers/net/phy/phy-c45.c

+74 −55
Original line number Diff line number Diff line
@@ -920,48 +920,16 @@ int genphy_c45_pma_baset1_read_abilities(struct phy_device *phydev) 
EXPORT_SYMBOL_GPL(genphy_c45_pma_baset1_read_abilities);



/**

 * genphy_c45_pma_read_abilities - read supported link modes from PMA

 * genphy_c45_pma_read_ext_abilities - read supported link modes from PMA

 * @phydev: target phy_device struct

 *

 * Read the supported link modes from the PMA Status 2 (1.8) register. If bit

 * 1.8.9 is set, the list of supported modes is build using the values in the

 * PMA Extended Abilities (1.11) register, indicating 1000BASET an 10G related

 * modes. If bit 1.11.14 is set, then the list is also extended with the modes

 * in the 2.5G/5G PMA Extended register (1.21), indicating if 2.5GBASET and

 * 5GBASET are supported.

 * Read the supported link modes from the PMA/PMD extended ability register

 * (Register 1.11).

 */

int genphy_c45_pma_read_abilities(struct phy_device *phydev)

int genphy_c45_pma_read_ext_abilities(struct phy_device *phydev)

{

	int val;



	linkmode_clear_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, phydev->supported);

	if (phydev->c45_ids.mmds_present & MDIO_DEVS_AN) {

		val = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_STAT1);

		if (val < 0)

			return val;



		if (val & MDIO_AN_STAT1_ABLE)

			linkmode_set_bit(ETHTOOL_LINK_MODE_Autoneg_BIT,

					 phydev->supported);

	}



	val = phy_read_mmd(phydev, MDIO_MMD_PMAPMD, MDIO_STAT2);

	if (val < 0)

		return val;



	linkmode_mod_bit(ETHTOOL_LINK_MODE_10000baseSR_Full_BIT,

			 phydev->supported,

			 val & MDIO_PMA_STAT2_10GBSR);



	linkmode_mod_bit(ETHTOOL_LINK_MODE_10000baseLR_Full_BIT,

			 phydev->supported,

			 val & MDIO_PMA_STAT2_10GBLR);



	linkmode_mod_bit(ETHTOOL_LINK_MODE_10000baseER_Full_BIT,

			 phydev->supported,

			 val & MDIO_PMA_STAT2_10GBER);



	if (val & MDIO_PMA_STAT2_EXTABLE) {

	val = phy_read_mmd(phydev, MDIO_MMD_PMAPMD, MDIO_PMA_EXTABLE);

	if (val < 0)

		return val;
@@ -1019,6 +987,57 @@ int genphy_c45_pma_read_abilities(struct phy_device *phydev) 
		if (val < 0)

			return val;

	}



	return 0;

}

EXPORT_SYMBOL_GPL(genphy_c45_pma_read_ext_abilities);



/**

 * genphy_c45_pma_read_abilities - read supported link modes from PMA

 * @phydev: target phy_device struct

 *

 * Read the supported link modes from the PMA Status 2 (1.8) register. If bit

 * 1.8.9 is set, the list of supported modes is build using the values in the

 * PMA Extended Abilities (1.11) register, indicating 1000BASET an 10G related

 * modes. If bit 1.11.14 is set, then the list is also extended with the modes

 * in the 2.5G/5G PMA Extended register (1.21), indicating if 2.5GBASET and

 * 5GBASET are supported.

 */

int genphy_c45_pma_read_abilities(struct phy_device *phydev)

{

	int val;



	linkmode_clear_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, phydev->supported);

	if (phydev->c45_ids.mmds_present & MDIO_DEVS_AN) {

		val = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_STAT1);

		if (val < 0)

			return val;



		if (val & MDIO_AN_STAT1_ABLE)

			linkmode_set_bit(ETHTOOL_LINK_MODE_Autoneg_BIT,

					 phydev->supported);

	}



	val = phy_read_mmd(phydev, MDIO_MMD_PMAPMD, MDIO_STAT2);

	if (val < 0)

		return val;



	linkmode_mod_bit(ETHTOOL_LINK_MODE_10000baseSR_Full_BIT,

			 phydev->supported,

			 val & MDIO_PMA_STAT2_10GBSR);



	linkmode_mod_bit(ETHTOOL_LINK_MODE_10000baseLR_Full_BIT,

			 phydev->supported,

			 val & MDIO_PMA_STAT2_10GBLR);



	linkmode_mod_bit(ETHTOOL_LINK_MODE_10000baseER_Full_BIT,

			 phydev->supported,

			 val & MDIO_PMA_STAT2_10GBER);



	if (val & MDIO_PMA_STAT2_EXTABLE) {

		val = genphy_c45_pma_read_ext_abilities(phydev);

		if (val < 0)

			return val;

	}



	/* This is optional functionality. If not supported, we may get an error

include/linux/phy.h

+1 −0
Original line number Diff line number Diff line
@@ -1866,6 +1866,7 @@ int genphy_c45_an_config_aneg(struct phy_device *phydev); 
int genphy_c45_an_disable_aneg(struct phy_device *phydev);

int genphy_c45_read_mdix(struct phy_device *phydev);

int genphy_c45_pma_read_abilities(struct phy_device *phydev);

int genphy_c45_pma_read_ext_abilities(struct phy_device *phydev);

int genphy_c45_pma_baset1_read_abilities(struct phy_device *phydev);

int genphy_c45_read_eee_abilities(struct phy_device *phydev);

int genphy_c45_pma_baset1_read_master_slave(struct phy_device *phydev);