Commit 0c53dc32 authored by Andrew Jeffery's avatar Andrew Jeffery Committed by Ulf Hansson
Browse files

mmc: sdhci-of-aspeed: Add AST2600 bus clock support 



The AST2600 can achieve HS200 speeds with a change to the bus clock
divisor behaviour. The divisor can also be more accurate with respect
to the requested clock rate, but keep the one-hot behaviour for
backwards compatibility with the AST2400 and AST2500.

Signed-off-by: default avatarAndrew Jeffery <andrew@aj.id.au>
Link: https://lore.kernel.org/r/20210114031433.2388532-4-andrew@aj.id.au


Signed-off-by: default avatarUlf Hansson <ulf.hansson@linaro.org>
parent 2fc88f92

drivers/mmc/host/sdhci-of-aspeed.c

+33 −4
Original line number Diff line number Diff line
@@ -59,6 +59,7 @@ struct aspeed_sdhci_phase_desc { 
};



struct aspeed_sdhci_pdata {

	unsigned int clk_div_start;

	const struct aspeed_sdhci_phase_desc *phase_desc;

	size_t nr_phase_descs;

};
@@ -200,10 +201,13 @@ static void aspeed_sdhci_set_clock(struct sdhci_host *host, unsigned int clock) 
{

	struct sdhci_pltfm_host *pltfm_host;

	unsigned long parent, bus;

	struct aspeed_sdhci *sdhci;

	int div;

	u16 clk;



	pltfm_host = sdhci_priv(host);

	sdhci = sdhci_pltfm_priv(pltfm_host);



	parent = clk_get_rate(pltfm_host->clk);



	sdhci_writew(host, 0, SDHCI_CLOCK_CONTROL);
@@ -214,7 +218,23 @@ static void aspeed_sdhci_set_clock(struct sdhci_host *host, unsigned int clock) 
	if (WARN_ON(clock > host->max_clk))

		clock = host->max_clk;



	for (div = 2; div < 256; div *= 2) {

	/*

	 * Regarding the AST2600:

	 *

	 * If (EMMC12C[7:6], EMMC12C[15:8] == 0) then

	 *   period of SDCLK = period of SDMCLK.

	 *

	 * If (EMMC12C[7:6], EMMC12C[15:8] != 0) then

	 *   period of SDCLK = period of SDMCLK * 2 * (EMMC12C[7:6], EMMC[15:8])

	 *

	 * If you keep EMMC12C[7:6] = 0 and EMMC12C[15:8] as one-hot,

	 * 0x1/0x2/0x4/etc, you will find it is compatible to AST2400 or AST2500

	 *

	 * Keep the one-hot behaviour for backwards compatibility except for

	 * supporting the value 0 in (EMMC12C[7:6], EMMC12C[15:8]), and capture

	 * the 0-value capability in clk_div_start.

	 */

	for (div = sdhci->pdata->clk_div_start; div < 256; div *= 2) {

		bus = parent / div;

		if (bus <= clock)

			break;
@@ -316,6 +336,10 @@ static int aspeed_sdhci_probe(struct platform_device *pdev) 
	int ret;



	aspeed_pdata = of_device_get_match_data(&pdev->dev);

	if (!aspeed_pdata) {

		dev_err(&pdev->dev, "Missing platform configuration data\n");

		return -EINVAL;

	}



	host = sdhci_pltfm_init(pdev, &aspeed_sdhci_pdata, sizeof(*dev));

	if (IS_ERR(host))
@@ -334,7 +358,7 @@ static int aspeed_sdhci_probe(struct platform_device *pdev) 
	else if (slot >= 2)

		return -EINVAL;



	if (dev->pdata && slot < dev->pdata->nr_phase_descs) {

	if (slot < dev->pdata->nr_phase_descs) {

		dev->phase_desc = &dev->pdata->phase_desc[slot];

	} else {

		dev_info(&pdev->dev,
@@ -396,6 +420,10 @@ static int aspeed_sdhci_remove(struct platform_device *pdev) 
	return 0;

}



static const struct aspeed_sdhci_pdata ast2400_sdhci_pdata = {

	.clk_div_start = 2,

};



static const struct aspeed_sdhci_phase_desc ast2600_sdhci_phase[] = {

	/* SDHCI/Slot 0 */

	[0] = {
@@ -426,13 +454,14 @@ static const struct aspeed_sdhci_phase_desc ast2600_sdhci_phase[] = { 
};



static const struct aspeed_sdhci_pdata ast2600_sdhci_pdata = {

	.clk_div_start = 1,

	.phase_desc = ast2600_sdhci_phase,

	.nr_phase_descs = ARRAY_SIZE(ast2600_sdhci_phase),

};



static const struct of_device_id aspeed_sdhci_of_match[] = {

	{ .compatible = "aspeed,ast2400-sdhci", },

	{ .compatible = "aspeed,ast2500-sdhci", },

	{ .compatible = "aspeed,ast2400-sdhci", .data = &ast2400_sdhci_pdata, },

	{ .compatible = "aspeed,ast2500-sdhci", .data = &ast2400_sdhci_pdata, },

	{ .compatible = "aspeed,ast2600-sdhci", .data = &ast2600_sdhci_pdata, },

	{ }

};