Commit 0c673428 authored by Heng Zhou's avatar Heng Zhou Committed by Alex Deucher
Browse files

drm/amdgpu: Fix for GPU reset being blocked by KIQ I/O. 



There is some probability that reset workqueue is blocked by KIQ I/O for 10+ seconds after gpu hangs.
So we need to add a in_reset check during each KIQ register poll.

Signed-off-by: default avatarHeng Zhou <Heng.Zhou@amd.com>
Reviewed-by: default avatarChristian König <christian.koenig@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 0e190a04

drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c

+5 −0
Original line number Diff line number Diff line
@@ -1102,6 +1102,9 @@ uint32_t amdgpu_kiq_rreg(struct amdgpu_device *adev, uint32_t reg, uint32_t xcc_ 


	might_sleep();

	while (r < 1 && cnt++ < MAX_KIQ_REG_TRY) {

		if (amdgpu_in_reset(adev))

			goto failed_kiq_read;



		msleep(MAX_KIQ_REG_BAILOUT_INTERVAL);

		r = amdgpu_fence_wait_polling(ring, seq, MAX_KIQ_REG_WAIT);

	}
@@ -1171,6 +1174,8 @@ void amdgpu_kiq_wreg(struct amdgpu_device *adev, uint32_t reg, uint32_t v, uint3 


	might_sleep();

	while (r < 1 && cnt++ < MAX_KIQ_REG_TRY) {

		if (amdgpu_in_reset(adev))

			goto failed_kiq_write;



		msleep(MAX_KIQ_REG_BAILOUT_INTERVAL);

		r = amdgpu_fence_wait_polling(ring, seq, MAX_KIQ_REG_WAIT);