Commit 0c8b522d authored by Marc Zyngier's avatar Marc Zyngier
Browse files

Merge branch irq/qcom-pdc-cleanup into irq/irqchip-next 



* irq/qcom-pdc-cleanup:
  : .
  : Spring cleanup for the Qualcomm PDC driver, simplifying its
  : use of irq domains, replacing open-coded functionnalities with
  : the core code equivalent, and fixing the dodgy locking.
  : .
  irqchip/qcom-pdc: Drop open coded version of __assign_bit()
  irqchip/qcom-pdc: Fix broken locking
  irqchip/qcom-pdc: Kill qcom_pdc_translate helper
  irqchip/qcom-pdc: Kill non-wakeup irqdomain
  irqchip/qcom-pdc: Kill PDC_NO_PARENT_IRQ

Signed-off-by: default avatarMarc Zyngier <maz@kernel.org>
parents 86c12c73 d2febf6b

drivers/irqchip/qcom-pdc.c

+28 −109
Original line number Diff line number Diff line
@@ -21,23 +21,19 @@ 
#include <linux/slab.h>

#include <linux/types.h>



#define PDC_MAX_IRQS		168

#define PDC_MAX_GPIO_IRQS	256



#define CLEAR_INTR(reg, intr)	(reg & ~(1 << intr))

#define ENABLE_INTR(reg, intr)	(reg | (1 << intr))



#define IRQ_ENABLE_BANK		0x10

#define IRQ_i_CFG		0x110



#define PDC_NO_PARENT_IRQ	~0UL



struct pdc_pin_region {

	u32 pin_base;

	u32 parent_base;

	u32 cnt;

};



#define pin_to_hwirq(r, p)	((r)->parent_base + (p) - (r)->pin_base)



static DEFINE_RAW_SPINLOCK(pdc_lock);

static void __iomem *pdc_base;

static struct pdc_pin_region *pdc_region;
@@ -56,17 +52,18 @@ static u32 pdc_reg_read(int reg, u32 i) 
static void pdc_enable_intr(struct irq_data *d, bool on)

{

	int pin_out = d->hwirq;

	unsigned long enable;

	unsigned long flags;

	u32 index, mask;

	u32 enable;



	index = pin_out / 32;

	mask = pin_out % 32;



	raw_spin_lock(&pdc_lock);

	raw_spin_lock_irqsave(&pdc_lock, flags);

	enable = pdc_reg_read(IRQ_ENABLE_BANK, index);

	enable = on ? ENABLE_INTR(enable, mask) : CLEAR_INTR(enable, mask);

	__assign_bit(mask, &enable, on);

	pdc_reg_write(IRQ_ENABLE_BANK, index, enable);

	raw_spin_unlock(&pdc_lock);

	raw_spin_unlock_irqrestore(&pdc_lock, flags);

}



static void qcom_pdc_gic_disable(struct irq_data *d)
@@ -186,34 +183,17 @@ static struct irq_chip qcom_pdc_gic_chip = { 
	.irq_set_affinity	= irq_chip_set_affinity_parent,

};



static irq_hw_number_t get_parent_hwirq(int pin)

static struct pdc_pin_region *get_pin_region(int pin)

{

	int i;

	struct pdc_pin_region *region;



	for (i = 0; i < pdc_region_cnt; i++) {

		region = &pdc_region[i];

		if (pin >= region->pin_base &&

		    pin < region->pin_base + region->cnt)

			return (region->parent_base + pin - region->pin_base);

	}



	return PDC_NO_PARENT_IRQ;

}



static int qcom_pdc_translate(struct irq_domain *d, struct irq_fwspec *fwspec,

			      unsigned long *hwirq, unsigned int *type)

{

	if (is_of_node(fwspec->fwnode)) {

		if (fwspec->param_count != 2)

			return -EINVAL;



		*hwirq = fwspec->param[0];

		*type = fwspec->param[1] & IRQ_TYPE_SENSE_MASK;

		return 0;

		if (pin >= pdc_region[i].pin_base &&

		    pin < pdc_region[i].pin_base + pdc_region[i].cnt)

			return &pdc_region[i];

	}



	return -EINVAL;

	return NULL;

}



static int qcom_pdc_alloc(struct irq_domain *domain, unsigned int virq,
@@ -221,55 +201,12 @@ static int qcom_pdc_alloc(struct irq_domain *domain, unsigned int virq, 
{

	struct irq_fwspec *fwspec = data;

	struct irq_fwspec parent_fwspec;

	irq_hw_number_t hwirq, parent_hwirq;

	unsigned int type;

	int ret;



	ret = qcom_pdc_translate(domain, fwspec, &hwirq, &type);

	if (ret)

		return ret;



	ret  = irq_domain_set_hwirq_and_chip(domain, virq, hwirq,

					     &qcom_pdc_gic_chip, NULL);

	if (ret)

		return ret;



	parent_hwirq = get_parent_hwirq(hwirq);

	if (parent_hwirq == PDC_NO_PARENT_IRQ)

		return irq_domain_disconnect_hierarchy(domain->parent, virq);



	if (type & IRQ_TYPE_EDGE_BOTH)

		type = IRQ_TYPE_EDGE_RISING;



	if (type & IRQ_TYPE_LEVEL_MASK)

		type = IRQ_TYPE_LEVEL_HIGH;



	parent_fwspec.fwnode      = domain->parent->fwnode;

	parent_fwspec.param_count = 3;

	parent_fwspec.param[0]    = 0;

	parent_fwspec.param[1]    = parent_hwirq;

	parent_fwspec.param[2]    = type;



	return irq_domain_alloc_irqs_parent(domain, virq, nr_irqs,

					    &parent_fwspec);

}



static const struct irq_domain_ops qcom_pdc_ops = {

	.translate	= qcom_pdc_translate,

	.alloc		= qcom_pdc_alloc,

	.free		= irq_domain_free_irqs_common,

};



static int qcom_pdc_gpio_alloc(struct irq_domain *domain, unsigned int virq,

			       unsigned int nr_irqs, void *data)

{

	struct irq_fwspec *fwspec = data;

	struct irq_fwspec parent_fwspec;

	irq_hw_number_t hwirq, parent_hwirq;

	struct pdc_pin_region *region;

	irq_hw_number_t hwirq;

	unsigned int type;

	int ret;



	ret = qcom_pdc_translate(domain, fwspec, &hwirq, &type);

	ret = irq_domain_translate_twocell(domain, fwspec, &hwirq, &type);

	if (ret)

		return ret;
@@ -281,8 +218,8 @@ static int qcom_pdc_gpio_alloc(struct irq_domain *domain, unsigned int virq, 
	if (ret)

		return ret;



	parent_hwirq = get_parent_hwirq(hwirq);

	if (parent_hwirq == PDC_NO_PARENT_IRQ)

	region = get_pin_region(hwirq);

	if (!region)

		return irq_domain_disconnect_hierarchy(domain->parent, virq);



	if (type & IRQ_TYPE_EDGE_BOTH)
@@ -294,23 +231,16 @@ static int qcom_pdc_gpio_alloc(struct irq_domain *domain, unsigned int virq, 
	parent_fwspec.fwnode      = domain->parent->fwnode;

	parent_fwspec.param_count = 3;

	parent_fwspec.param[0]    = 0;

	parent_fwspec.param[1]    = parent_hwirq;

	parent_fwspec.param[1]    = pin_to_hwirq(region, hwirq);

	parent_fwspec.param[2]    = type;



	return irq_domain_alloc_irqs_parent(domain, virq, nr_irqs,

					    &parent_fwspec);

}



static int qcom_pdc_gpio_domain_select(struct irq_domain *d,

				       struct irq_fwspec *fwspec,

				       enum irq_domain_bus_token bus_token)

{

	return bus_token == DOMAIN_BUS_WAKEUP;

}



static const struct irq_domain_ops qcom_pdc_gpio_ops = {

	.select		= qcom_pdc_gpio_domain_select,

	.alloc		= qcom_pdc_gpio_alloc,

static const struct irq_domain_ops qcom_pdc_ops = {

	.translate	= irq_domain_translate_twocell,

	.alloc		= qcom_pdc_alloc,

	.free		= irq_domain_free_irqs_common,

};
@@ -361,7 +291,7 @@ static int pdc_setup_pin_mapping(struct device_node *np) 


static int qcom_pdc_init(struct device_node *node, struct device_node *parent)

{

	struct irq_domain *parent_domain, *pdc_domain, *pdc_gpio_domain;

	struct irq_domain *parent_domain, *pdc_domain;

	int ret;



	pdc_base = of_iomap(node, 0);
@@ -383,32 +313,21 @@ static int qcom_pdc_init(struct device_node *node, struct device_node *parent) 
		goto fail;

	}



	pdc_domain = irq_domain_create_hierarchy(parent_domain, 0, PDC_MAX_IRQS,

	pdc_domain = irq_domain_create_hierarchy(parent_domain,

					IRQ_DOMAIN_FLAG_QCOM_PDC_WAKEUP,

					PDC_MAX_GPIO_IRQS,

					of_fwnode_handle(node),

					&qcom_pdc_ops, NULL);

	if (!pdc_domain) {

		pr_err("%pOF: GIC domain add failed\n", node);

		pr_err("%pOF: PDC domain add failed\n", node);

		ret = -ENOMEM;

		goto fail;

	}



	pdc_gpio_domain = irq_domain_create_hierarchy(parent_domain,

					IRQ_DOMAIN_FLAG_QCOM_PDC_WAKEUP,

					PDC_MAX_GPIO_IRQS,

					of_fwnode_handle(node),

					&qcom_pdc_gpio_ops, NULL);

	if (!pdc_gpio_domain) {

		pr_err("%pOF: PDC domain add failed for GPIO domain\n", node);

		ret = -ENOMEM;

		goto remove;

	}



	irq_domain_update_bus_token(pdc_gpio_domain, DOMAIN_BUS_WAKEUP);

	irq_domain_update_bus_token(pdc_domain, DOMAIN_BUS_WAKEUP);



	return 0;



remove:

	irq_domain_remove(pdc_domain);

fail:

	kfree(pdc_region);

	iounmap(pdc_base);