Commit 0cbe1047 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'char-misc-6.13-rc7' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc 

Pull char/misc/IIO driver fixes from Greg KH:
 "Here are a bunch of small IIO and interconnect and other driver fixes
  to resolve reported issues. Included in here are:

   - loads of iio driver fixes as a result of an audit of places where
    uninitialized data would leak to userspace.

   - other smaller, and normal, iio driver fixes.

   - mhi driver fix

   - interconnect driver fixes

   - pci1xxxx driver fix

  All of these have been in linux-next for a while with no reported
  issues"

* tag 'char-misc-6.13-rc7' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc: (32 commits)
  misc: microchip: pci1xxxx: Resolve return code mismatch during GPIO set config
  misc: microchip: pci1xxxx: Resolve kernel panic during GPIO IRQ handling
  interconnect: icc-clk: check return values of devm_kasprintf()
  interconnect: qcom: icc-rpm: Set the count member before accessing the flex array
  iio: adc: ti-ads1119: fix sample size in scan struct for triggered buffer
  iio: temperature: tmp006: fix information leak in triggered buffer
  iio: inkern: call iio_device_put() only on mapped devices
  iio: adc: ad9467: Fix the "don't allow reading vref if not available" case
  iio: adc: at91: call input_free_device() on allocated iio_dev
  iio: adc: ad7173: fix using shared static info struct
  iio: adc: ti-ads124s08: Use gpiod_set_value_cansleep()
  iio: adc: ti-ads1119: fix information leak in triggered buffer
  iio: pressure: zpa2326: fix information leak in triggered buffer
  iio: adc: rockchip_saradc: fix information leak in triggered buffer
  iio: imu: kmx61: fix information leak in triggered buffer
  iio: light: vcnl4035: fix information leak in triggered buffer
  iio: light: bh1745: fix information leak in triggered buffer
  iio: adc: ti-ads8688: fix information leak in triggered buffer
  iio: dummy: iio_simply_dummy_buffer: fix information leak in triggered buffer
  iio: test: Fix GTS test config
  ...
parents 083f9fac c7a5378a

Documentation/devicetree/bindings/iio/st,st-sensors.yaml

+1 −0
Original line number Diff line number Diff line
@@ -65,6 +65,7 @@ properties: 
          - st,lsm9ds0-gyro

      - description: STMicroelectronics Magnetometers

        enum:

          - st,iis2mdc

          - st,lis2mdl

          - st,lis3mdl-magn

          - st,lsm303agr-magn

drivers/bus/mhi/host/pci_generic.c

+1 −1
Original line number Diff line number Diff line
@@ -917,7 +917,7 @@ static int mhi_pci_claim(struct mhi_controller *mhi_cntrl, 
		return err;

	}



	mhi_cntrl->regs = pcim_iomap_region(pdev, 1 << bar_num, pci_name(pdev));

	mhi_cntrl->regs = pcim_iomap_region(pdev, bar_num, pci_name(pdev));

	if (IS_ERR(mhi_cntrl->regs)) {

		err = PTR_ERR(mhi_cntrl->regs);

		dev_err(&pdev->dev, "failed to map pci region: %d\n", err);

drivers/iio/adc/ad4695.c

+69 −31
Original line number Diff line number Diff line
@@ -91,6 +91,7 @@ 
#define AD4695_T_WAKEUP_SW_MS		3

#define AD4695_T_REFBUF_MS		100

#define AD4695_T_REGCONFIG_NS		20

#define AD4695_T_SCK_CNV_DELAY_NS	80

#define AD4695_REG_ACCESS_SCLK_HZ	(10 * MEGA)



/* Max number of voltage input channels. */
@@ -132,8 +133,13 @@ struct ad4695_state { 
	unsigned int vref_mv;

	/* Common mode input pin voltage. */

	unsigned int com_mv;

	/* 1 per voltage and temperature chan plus 1 xfer to trigger 1st CNV */

	struct spi_transfer buf_read_xfer[AD4695_MAX_CHANNELS + 2];

	/*

	 * 2 per voltage and temperature chan plus 1 xfer to trigger 1st

	 * CNV. Excluding the trigger xfer, every 2nd xfer only serves

	 * to control CS and add a delay between the last SCLK and next

	 * CNV rising edges.

	 */

	struct spi_transfer buf_read_xfer[AD4695_MAX_CHANNELS * 2 + 3];

	struct spi_message buf_read_msg;

	/* Raw conversion data received. */

	u8 buf[ALIGN((AD4695_MAX_CHANNELS + 2) * AD4695_MAX_CHANNEL_SIZE,
@@ -423,7 +429,7 @@ static int ad4695_buffer_preenable(struct iio_dev *indio_dev) 
	u8 temp_chan_bit = st->chip_info->num_voltage_inputs;

	u32 bit, num_xfer, num_slots;

	u32 temp_en = 0;

	int ret;

	int ret, rx_buf_offset = 0;



	/*

	 * We are using the advanced sequencer since it is the only way to read
@@ -449,11 +455,9 @@ static int ad4695_buffer_preenable(struct iio_dev *indio_dev) 
	iio_for_each_active_channel(indio_dev, bit) {

		xfer = &st->buf_read_xfer[num_xfer];

		xfer->bits_per_word = 16;

		xfer->rx_buf = &st->buf[(num_xfer - 1) * 2];

		xfer->rx_buf = &st->buf[rx_buf_offset];

		xfer->len = 2;

		xfer->cs_change = 1;

		xfer->cs_change_delay.value = AD4695_T_CONVERT_NS;

		xfer->cs_change_delay.unit = SPI_DELAY_UNIT_NSECS;

		rx_buf_offset += xfer->len;



		if (bit == temp_chan_bit) {

			temp_en = 1;
@@ -468,21 +472,44 @@ static int ad4695_buffer_preenable(struct iio_dev *indio_dev) 
		}



		num_xfer++;



		/*

		 * We need to add a blank xfer in data reads, to meet the timing

		 * requirement of a minimum delay between the last SCLK rising

		 * edge and the CS deassert.

		 */

		xfer = &st->buf_read_xfer[num_xfer];

		xfer->delay.value = AD4695_T_SCK_CNV_DELAY_NS;

		xfer->delay.unit = SPI_DELAY_UNIT_NSECS;

		xfer->cs_change = 1;

		xfer->cs_change_delay.value = AD4695_T_CONVERT_NS;

		xfer->cs_change_delay.unit = SPI_DELAY_UNIT_NSECS;



		num_xfer++;

	}



	/*

	 * The advanced sequencer requires that at least 2 slots are enabled.

	 * Since slot 0 is always used for other purposes, we need only 1

	 * enabled voltage channel to meet this requirement.  If the temperature

	 * channel is the only enabled channel, we need to add one more slot

	 * in the sequence but not read from it.

	 * channel is the only enabled channel, we need to add one more slot in

	 * the sequence but not read from it. This is because the temperature

	 * sensor is sampled at the end of the channel sequence in advanced

	 * sequencer mode (see datasheet page 38).

	 *

	 * From the iio_for_each_active_channel() block above, we now have an

	 * xfer with data followed by a blank xfer to allow us to meet the

	 * timing spec, so move both of those up before adding an extra to

	 * handle the temperature-only case.

	 */

	if (num_slots < 2) {

		/* move last xfer so we can insert one more xfer before it */

		st->buf_read_xfer[num_xfer] = *xfer;

		/* Move last two xfers */

		st->buf_read_xfer[num_xfer] = st->buf_read_xfer[num_xfer - 1];

		st->buf_read_xfer[num_xfer - 1] = st->buf_read_xfer[num_xfer - 2];

		num_xfer++;



		/* modify 2nd to last xfer for extra slot */

		/* Modify inserted xfer for extra slot. */

		xfer = &st->buf_read_xfer[num_xfer - 3];

		memset(xfer, 0, sizeof(*xfer));

		xfer->cs_change = 1;

		xfer->delay.value = st->chip_info->t_acq_ns;
@@ -499,6 +526,12 @@ static int ad4695_buffer_preenable(struct iio_dev *indio_dev) 
			return ret;



		num_slots++;



		/*

		 * We still want to point at the last xfer when finished, so

		 * update the pointer.

		 */

		xfer = &st->buf_read_xfer[num_xfer - 1];

	}



	/*
@@ -583,8 +616,20 @@ static irqreturn_t ad4695_trigger_handler(int irq, void *p) 
 */

static int ad4695_read_one_sample(struct ad4695_state *st, unsigned int address)

{

	struct spi_transfer xfer[2] = { };

	int ret, i = 0;

	struct spi_transfer xfers[2] = {

		{

			.speed_hz = AD4695_REG_ACCESS_SCLK_HZ,

			.bits_per_word = 16,

			.tx_buf = &st->cnv_cmd,

			.len = 2,

		},

		{

			/* Required delay between last SCLK and CNV/CS */

			.delay.value = AD4695_T_SCK_CNV_DELAY_NS,

			.delay.unit = SPI_DELAY_UNIT_NSECS,

		}

	};

	int ret;



	ret = ad4695_set_single_cycle_mode(st, address);

	if (ret)
@@ -592,29 +637,22 @@ static int ad4695_read_one_sample(struct ad4695_state *st, unsigned int address) 


	/*

	 * Setting the first channel to the temperature channel isn't supported

	 * in single-cycle mode, so we have to do an extra xfer to read the

	 * temperature.

	 * in single-cycle mode, so we have to do an extra conversion to read

	 * the temperature.

	 */

	if (address == AD4695_CMD_TEMP_CHAN) {

		/* We aren't reading, so we can make this a short xfer. */

		st->cnv_cmd2 = AD4695_CMD_TEMP_CHAN << 3;

		xfer[0].tx_buf = &st->cnv_cmd2;

		xfer[0].len = 1;

		xfer[0].cs_change = 1;

		xfer[0].cs_change_delay.value = AD4695_T_CONVERT_NS;

		xfer[0].cs_change_delay.unit = SPI_DELAY_UNIT_NSECS;



		i = 1;

		st->cnv_cmd = AD4695_CMD_TEMP_CHAN << 11;



		ret = spi_sync_transfer(st->spi, xfers, ARRAY_SIZE(xfers));

		if (ret)

			return ret;

	}



	/* Then read the result and exit conversion mode. */

	st->cnv_cmd = AD4695_CMD_EXIT_CNV_MODE << 11;

	xfer[i].bits_per_word = 16;

	xfer[i].tx_buf = &st->cnv_cmd;

	xfer[i].rx_buf = &st->raw_data;

	xfer[i].len = 2;

	xfers[0].rx_buf = &st->raw_data;



	return spi_sync_transfer(st->spi, xfer, i + 1);

	return spi_sync_transfer(st->spi, xfers, ARRAY_SIZE(xfers));

}



static int ad4695_read_raw(struct iio_dev *indio_dev,

drivers/iio/adc/ad7124.c

+3 −0
Original line number Diff line number Diff line
@@ -917,6 +917,9 @@ static int ad7124_setup(struct ad7124_state *st) 
		 * set all channels to this default value.

		 */

		ad7124_set_channel_odr(st, i, 10);



		/* Disable all channels to prevent unintended conversions. */

		ad_sd_write_reg(&st->sd, AD7124_CHANNEL(i), 2, 0);

	}



	ret = ad_sd_write_reg(&st->sd, AD7124_ADC_CONTROL, 2, st->adc_control);

drivers/iio/adc/ad7173.c

+6 −4
Original line number Diff line number Diff line
@@ -200,6 +200,7 @@ struct ad7173_channel { 


struct ad7173_state {

	struct ad_sigma_delta sd;

	struct ad_sigma_delta_info sigma_delta_info;

	const struct ad7173_device_info *info;

	struct ad7173_channel *channels;

	struct regulator_bulk_data regulators[3];
@@ -753,7 +754,7 @@ static int ad7173_disable_one(struct ad_sigma_delta *sd, unsigned int chan) 
	return ad_sd_write_reg(sd, AD7173_REG_CH(chan), 2, 0);

}



static struct ad_sigma_delta_info ad7173_sigma_delta_info = {

static const struct ad_sigma_delta_info ad7173_sigma_delta_info = {

	.set_channel = ad7173_set_channel,

	.append_status = ad7173_append_status,

	.disable_all = ad7173_disable_all,
@@ -1403,7 +1404,7 @@ static int ad7173_fw_parse_device_config(struct iio_dev *indio_dev) 
	if (ret < 0)

		return dev_err_probe(dev, ret, "Interrupt 'rdy' is required\n");



	ad7173_sigma_delta_info.irq_line = ret;

	st->sigma_delta_info.irq_line = ret;



	return ad7173_fw_parse_channel_config(indio_dev);

}
@@ -1436,8 +1437,9 @@ static int ad7173_probe(struct spi_device *spi) 
	spi->mode = SPI_MODE_3;

	spi_setup(spi);



	ad7173_sigma_delta_info.num_slots = st->info->num_configs;

	ret = ad_sd_init(&st->sd, indio_dev, spi, &ad7173_sigma_delta_info);

	st->sigma_delta_info = ad7173_sigma_delta_info;

	st->sigma_delta_info.num_slots = st->info->num_configs;

	ret = ad_sd_init(&st->sd, indio_dev, spi, &st->sigma_delta_info);

	if (ret)

		return ret;