Commit 0cf80506 authored by Ryan Seto's avatar Ryan Seto Committed by Alex Deucher
Browse files

drm/amd/display: Fix visual confirm bug for SubVP 



[Why]
Visual confirm was incorrect on dual monitor SubVP setup

[How]
Adjusted p_state assignment for dual monitor SubVP setup

Signed-off-by: default avatarRyan Seto <ryanseto@amd.com>
Reviewed-by: default avatarChaitanya Dhere <chaitanya.dhere@amd.com>
Signed-off-by: default avatarAurabindo Pillai <aurabindo.pillai@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 14d6ca07

drivers/gpu/drm/amd/display/dc/dml2/dml21/dml21_translation_helper.c

+10 −3
Original line number Diff line number Diff line
@@ -1183,7 +1183,8 @@ void dml21_get_pipe_mcache_config( 


void dml21_set_dc_p_state_type(

		struct pipe_ctx *pipe_ctx,

		struct dml2_per_stream_programming *stream_programming)

		struct dml2_per_stream_programming *stream_programming,

		bool sub_vp_enabled)

{

	switch (stream_programming->uclk_pstate_method) {

	case dml2_uclk_pstate_support_method_vactive:
@@ -1192,6 +1193,9 @@ void dml21_set_dc_p_state_type( 
		break;

	case dml2_uclk_pstate_support_method_vblank:

	case dml2_uclk_pstate_support_method_fw_vblank_drr:

		if (sub_vp_enabled)

			pipe_ctx->p_state_type = P_STATE_V_BLANK_SUB_VP;

		else

			pipe_ctx->p_state_type = P_STATE_V_BLANK;

		break;

	case dml2_uclk_pstate_support_method_fw_subvp_phantom:
@@ -1199,6 +1203,9 @@ void dml21_set_dc_p_state_type( 
		pipe_ctx->p_state_type = P_STATE_SUB_VP;

		break;

	case dml2_uclk_pstate_support_method_fw_drr:

		if (sub_vp_enabled)

			pipe_ctx->p_state_type = P_STATE_DRR_SUB_VP;

		else

			pipe_ctx->p_state_type = P_STATE_FPO;

		break;

	default:

drivers/gpu/drm/amd/display/dc/dml2/dml21/dml21_translation_helper.h

+1 −1
Original line number Diff line number Diff line
@@ -26,5 +26,5 @@ void dml21_extract_legacy_watermark_set(const struct dc *in_dc, struct dcn_water 
void dml21_extract_watermark_sets(const struct dc *in_dc, union dcn_watermark_set *watermarks, struct dml2_context *in_ctx);

void dml21_map_hw_resources(struct dml2_context *dml_ctx);

void dml21_get_pipe_mcache_config(struct dc_state *context, struct pipe_ctx *pipe_ctx, struct dml2_per_plane_programming *pln_prog, struct dml2_pipe_configuration_descriptor *mcache_pipe_config);

void dml21_set_dc_p_state_type(struct pipe_ctx *pipe_ctx, struct dml2_per_stream_programming *stream_programming);

void dml21_set_dc_p_state_type(struct pipe_ctx *pipe_ctx, struct dml2_per_stream_programming *stream_programming, bool sub_vp_enabled);

#endif

drivers/gpu/drm/amd/display/dc/dml2/dml21/dml21_utils.c

+20 −2
Original line number Diff line number Diff line
@@ -11,7 +11,6 @@ 


#include "dml2_core_dcn4_calcs.h"





int dml21_helper_find_dml_pipe_idx_by_stream_id(struct dml2_context *ctx, unsigned int stream_id)

{

	int i;
@@ -280,6 +279,23 @@ bool check_dp2p0_output_encoder(const struct pipe_ctx *pipe_ctx) 
		dc_is_dp_signal(pipe_ctx->stream->signal));

}





static bool is_sub_vp_enabled(struct dc *dc, struct dc_state *context)

{

	int i;



	for (i = 0; i < dc->res_pool->pipe_count; i++) {

		struct pipe_ctx *pipe_ctx = &context->res_ctx.pipe_ctx[i];



		if (pipe_ctx->stream && dc_state_get_paired_subvp_stream(context, pipe_ctx->stream) &&

							dc_state_get_pipe_subvp_type(context, pipe_ctx) == SUBVP_MAIN) {

			return true;

		}

	}

	return false;

}





void dml21_program_dc_pipe(struct dml2_context *dml_ctx, struct dc_state *context, struct pipe_ctx *pipe_ctx, struct dml2_per_plane_programming *pln_prog,

		struct dml2_per_stream_programming *stream_prog)

{
@@ -317,7 +333,9 @@ void dml21_program_dc_pipe(struct dml2_context *dml_ctx, struct dc_state *contex 
	dml21_populate_mall_allocation_size(context, dml_ctx, pln_prog, pipe_ctx);

	memcpy(&context->bw_ctx.bw.dcn.mcache_allocations[pipe_ctx->pipe_idx], &pln_prog->mcache_allocation, sizeof(struct dml2_mcache_surface_allocation));



	dml21_set_dc_p_state_type(pipe_ctx, stream_prog);

	bool sub_vp_enabled = is_sub_vp_enabled(pipe_ctx->stream->ctx->dc, context);



	dml21_set_dc_p_state_type(pipe_ctx, stream_prog, sub_vp_enabled);

}



static struct dc_stream_state *dml21_add_phantom_stream(struct dml2_context *dml_ctx,