Commit 0dcead77 authored by Jouni Högander's avatar Jouni Högander
Browse files

drm/i915/vrr: Prepare to Use TRANS_PUSH mechanism for PSR frame change 



On Lunarlake and onward it is possible to generate PSR Frame Change
event using TRANS_PUSH mechanism:

Ensure push is performed on flip if needed by PSR.

Don't use intel_psr_trigger_frame_change_event if PSR uses trans push as
Frame Change event: When not using trans push to generate Frame Change
event plane/pipe register writes are triggering the event. This is causing
problems when transiting to PSR active/idle and the event is coming in. To
tackle this we are waiting PSR to idle and using
intel_psr_trigger_frame_change_event to ensure PSR exit. If the Frame
change event is triggered after everything is configured (on trans push) we
don't need to worry about all this.

Ensure possible intel_vrr_tg_disable call is not overwriting
LNL_TRANS_PUSH_PSR_PR_EN.

v8:
  - split adding intel_vrr_psr_frame_change_enable as a separate change
  - update commit message
v7:
  - HAS_PSR_FRAME_CHANGE macro moved to separate patch and renamed as
    HAS_PSR_TRANS_PUSH_FRAME_CHANGE
  - use intel_psr_use_trans_push instead of HAS_PSR_FRAME_CHANGE in
    intel_psr_trigger_frame_change
  - moved calling intel_vrr_psr_frame_change_enable away from this patch
v6:
  - add HAS_PSR_FRAME_CHANGE macro
  - use TRANS_PUSH in instead of TRAN_VRR_CTL
v5: use intel_psr_use_trans_push for intel_vrr_psr_frame_change_enable
v4:
  - use rmw when enabling/disabling transcoder
  - set TRANS_PUSH_EN conditionally in intel_vrr_send_push
  - do not call intel_vrr_send_push from intel_psr_trigger_frame_change
  - do not enable using TRANS_PUSH mechanism for PSR "Frame Change"
v3:
  - use rmw when enabling/disabling
  - keep LNL_TRANS_PUSH_PSR_PR_EN set always on LunarLake and onwards
v2: use intel_vrr_trans_push_enabled_set_clear instead of rmw

Signed-off-by: default avatarJouni Högander <jouni.hogander@intel.com>
Reviewed-by: default avatarAnkit Nautiyal <ankit.k.nautiyal@intel.com>
Link: https://patch.msgid.link/20260127124120.1069026-6-jouni.hogander@intel.com
parent ef7ae0e3

drivers/gpu/drm/i915/display/intel_crtc.c

+3 −1
Original line number Diff line number Diff line
@@ -747,7 +747,9 @@ void intel_pipe_update_end(struct intel_atomic_state *state, 
	 * which would cause the next frame to terminate already at vmin

	 * vblank start instead of vmax vblank start.

	 */

	if (!state->base.legacy_cursor_update)

	if (!state->base.legacy_cursor_update ||

	    (intel_psr_use_trans_push(new_crtc_state) &&

	     !new_crtc_state->vrr.enable))

		intel_vrr_send_push(NULL, new_crtc_state);



	local_irq_enable();

drivers/gpu/drm/i915/display/intel_psr.c

+5 −3
Original line number Diff line number Diff line
@@ -2516,7 +2516,9 @@ void intel_psr_trigger_frame_change_event(struct intel_dsb *dsb, 
		intel_pre_commit_crtc_state(state, crtc);

	struct intel_display *display = to_intel_display(crtc);



	if (crtc_state->has_psr)

	if (!crtc_state->has_psr || intel_psr_use_trans_push(crtc_state))

		return;



	intel_de_write_dsb(display, dsb,

			   CURSURFLIVE(display, crtc->pipe), 0);

}

drivers/gpu/drm/i915/display/intel_vrr.c

+3 −2
Original line number Diff line number Diff line
@@ -698,7 +698,7 @@ void intel_vrr_send_push(struct intel_dsb *dsb, 
	struct intel_display *display = to_intel_display(crtc_state);

	enum transcoder cpu_transcoder = crtc_state->cpu_transcoder;



	if (!crtc_state->vrr.enable)

	if (!crtc_state->vrr.enable && !intel_psr_use_trans_push(crtc_state))

		return;



	if (dsb)
@@ -920,7 +920,8 @@ static void intel_vrr_tg_disable(const struct intel_crtc_state *old_crtc_state) 
				       VRR_STATUS_VRR_EN_LIVE, 1000))

		drm_err(display->drm, "Timed out waiting for VRR live status to clear\n");



	intel_de_write(display, TRANS_PUSH(display, cpu_transcoder), 0);

	intel_de_rmw(display, TRANS_PUSH(display, cpu_transcoder),

		     TRANS_PUSH_EN, 0);

}



void intel_vrr_enable(const struct intel_crtc_state *crtc_state)