Commit 0e6bb5b7 authored by Jakub Kicinski's avatar Jakub Kicinski
Browse files

Merge git://git.kernel.org/pub/scm/linux/kernel/git/netdev/net 



Cross-merge networking fixes after downstream PR.

No conflicts.

Adjacent changes:

kernel/bpf/verifier.c
  82995598 ("bpf: Fix verifier log for async callback return values")
  a923819f ("bpf: Treat first argument as return value for bpf_throw")

Signed-off-by: default avatarJakub Kicinski <kuba@kernel.org>
parents 2f0968a0 e8c127b0

Documentation/arch/arm64/silicon-errata.rst

+2 −0
Original line number Diff line number Diff line
@@ -71,6 +71,8 @@ stable kernels. 
+----------------+-----------------+-----------------+-----------------------------+

| ARM            | Cortex-A510     | #2658417        | ARM64_ERRATUM_2658417       |

+----------------+-----------------+-----------------+-----------------------------+

| ARM            | Cortex-A520     | #2966298        | ARM64_ERRATUM_2966298       |

+----------------+-----------------+-----------------+-----------------------------+

| ARM            | Cortex-A53      | #826319         | ARM64_ERRATUM_826319        |

+----------------+-----------------+-----------------+-----------------------------+

| ARM            | Cortex-A53      | #827319         | ARM64_ERRATUM_827319        |

Documentation/devicetree/bindings/bus/fsl,imx8qxp-pixel-link-msi-bus.yaml

+0 −3
Original line number Diff line number Diff line
@@ -73,9 +73,6 @@ patternProperties: 
  "^.*@[0-9a-f]+$":

    description: Devices attached to the bus

    type: object

    properties:

      reg:

        maxItems: 1



    required:

      - reg

Documentation/devicetree/bindings/cache/andestech,ax45mp-cache.yaml

+1 −1
Original line number Diff line number Diff line
@@ -69,7 +69,7 @@ examples: 
  - |

    #include <dt-bindings/interrupt-controller/irq.h>



    cache-controller@2010000 {

    cache-controller@13400000 {

        compatible = "andestech,ax45mp-cache", "cache";

        reg = <0x13400000 0x100000>;

        interrupts = <508 IRQ_TYPE_LEVEL_HIGH>;

Documentation/devicetree/bindings/display/imx/fsl,imx6-hdmi.yaml

+1 −1
Original line number Diff line number Diff line
@@ -87,7 +87,7 @@ required: 
  - interrupts

  - ports



additionalProperties: false

unevaluatedProperties: false



examples:

  - |

Documentation/devicetree/bindings/interrupt-controller/arm,gic-v3.yaml

+12 −0
Original line number Diff line number Diff line
@@ -106,6 +106,12 @@ properties: 
    $ref: /schemas/types.yaml#/definitions/uint32

    maximum: 4096



  dma-noncoherent:

    description:

      Present if the GIC redistributors permit programming shareability

      and cacheability attributes but are connected to a non-coherent

      downstream interconnect.



  msi-controller:

    description:

      Only present if the Message Based Interrupt functionality is
@@ -193,6 +199,12 @@ patternProperties: 
      compatible:

        const: arm,gic-v3-its



      dma-noncoherent:

        description:

          Present if the GIC ITS permits programming shareability and

          cacheability attributes but is connected to a non-coherent

          downstream interconnect.



      msi-controller: true



      "#msi-cells":