Commit 0f368cb7 authored by Vasily Khoruzhick's avatar Vasily Khoruzhick Committed by Chen-Yu Tsai
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clk: sunxi-ng: a64: drop redundant CLK_PLL_VIDEO0_2X and CLK_PLL_MIPI 



Drop redundant CLK_PLL_VIDEO0_2X and CLK_PLL.MIPI. These are now
defined in dt-bindings/clock/sun50i-a64-ccu.h

Fixes: ca1170b6 ("clk: sunxi-ng: a64: force select PLL_MIPI in TCON0 mux")
Reviewed-by: default avatarDragan Simic <dsimic@manjaro.org>
Reviewed-by: default avatarChen-Yu Tsai <wens@csie.org>
Tested-by: Frank Oltmanns <frank@oltmanns.dev> # on pinephone
Tested-by: Stuart Gathman <stuart@gathman.org> # on OG pinebook
Signed-off-by: default avatarVasily Khoruzhick <anarsoul@gmail.com>
Link: https://patch.msgid.link/20250104074035.1611136-3-anarsoul@gmail.com


Signed-off-by: default avatarChen-Yu Tsai <wens@csie.org>
parent 9897831d

drivers/clk/sunxi-ng/ccu-sun50i-a64.h

+0 −2
Original line number Diff line number Diff line
@@ -21,7 +21,6 @@ 


/* PLL_VIDEO0 exported for HDMI PHY */



#define CLK_PLL_VIDEO0_2X		8

#define CLK_PLL_VE			9

#define CLK_PLL_DDR0			10
@@ -32,7 +31,6 @@ 
#define CLK_PLL_PERIPH1_2X		14

#define CLK_PLL_VIDEO1			15

#define CLK_PLL_GPU			16

#define CLK_PLL_MIPI			17

#define CLK_PLL_HSIC			18

#define CLK_PLL_DE			19

#define CLK_PLL_DDR1			20