Unverified Commit 0f93dddb authored by Mark Brown's avatar Mark Brown
Browse files

mtd: spinand: Octal DTR support 

Merge series from Miquel Raynal <miquel.raynal@bootlin.com>:

This series adds support for 8D-8D-8D in SPI NAND, which can already be
leveraged without any SPI changes as controllers already have this
support for some SPI NOR devices.

Among the few spi-mem patches, they are needed for building the SPI NAND
changes (especially the ODTR introduction at the end) and therefore an
immutable tag will be needed for merging in the MTD tree (unless all the
series goes through MTD directly ofc).
parents 26cbb4dd 86182718

.mailmap

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@@ -416,6 +416,7 @@ Juha Yrjola <at solidboot.com> 
Juha Yrjola <juha.yrjola@nokia.com>

Juha Yrjola <juha.yrjola@solidboot.com>

Julien Thierry <julien.thierry.kdev@gmail.com> <julien.thierry@arm.com>

Justin Iurman <justin.iurman@gmail.com> <justin.iurman@uliege.be>

Iskren Chernev <me@iskren.info> <iskren.chernev@gmail.com>

Kalle Valo <kvalo@kernel.org> <kvalo@codeaurora.org>

Kalle Valo <kvalo@kernel.org> <quic_kvalo@quicinc.com>
@@ -472,6 +473,10 @@ Linas Vepstas <linas@austin.ibm.com> 
Linus Lüssing <linus.luessing@c0d3.blue> <linus.luessing@ascom.ch>

Linus Lüssing <linus.luessing@c0d3.blue> <linus.luessing@web.de>

Linus Lüssing <linus.luessing@c0d3.blue> <ll@simonwunderlich.de>

Linus Walleij <linusw@kernel.org> <linus.walleij@ericsson.com>

Linus Walleij <linusw@kernel.org> <linus.walleij@stericsson.com>

Linus Walleij <linusw@kernel.org> <linus.walleij@linaro.org>

Linus Walleij <linusw@kernel.org> <triad@df.lth.se>

<linux-hardening@vger.kernel.org> <kernel-hardening@lists.openwall.com>

Li Yang <leoyang.li@nxp.com> <leoli@freescale.com>

Li Yang <leoyang.li@nxp.com> <leo@zh-kernel.org>
@@ -705,6 +710,8 @@ Sankeerth Billakanti <quic_sbillaka@quicinc.com> <sbillaka@codeaurora.org> 
Santosh Shilimkar <santosh.shilimkar@oracle.org>

Santosh Shilimkar <ssantosh@kernel.org>

Sarangdhar Joshi <spjoshi@codeaurora.org>

Saravana Kannan <saravanak@kernel.org> <skannan@codeaurora.org>

Saravana Kannan <saravanak@kernel.org> <saravanak@google.com>

Sascha Hauer <s.hauer@pengutronix.de>

Sahitya Tummala <quic_stummala@quicinc.com> <stummala@codeaurora.org>

Sathishkumar Muruganandam <quic_murugana@quicinc.com> <murugana@codeaurora.org>
@@ -794,6 +801,7 @@ Tanzir Hasan <tanzhasanwork@gmail.com> <tanzirh@google.com> 
Tejun Heo <htejun@gmail.com>

Tomeu Vizoso <tomeu@tomeuvizoso.net> <tomeu.vizoso@collabora.com>

Thomas Graf <tgraf@suug.ch>

Thomas Gleixner <tglx@kernel.org> <tglx@linutronix.de>

Thomas Körper <socketcan@esd.eu> <thomas.koerper@esd.eu>

Thomas Pedersen <twp@codeaurora.org>

Thorsten Blum <thorsten.blum@linux.dev> <thorsten.blum@toblux.com>

CREDITS

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@@ -1398,7 +1398,7 @@ D: SRM environment driver (for Alpha systems) 
P: 1024D/8399E1BB 250D 3BCF 7127 0D8C A444  A961 1DBD 5E75 8399 E1BB



N: Thomas Gleixner

E: tglx@linutronix.de

E: tglx@kernel.org

D: NAND flash hardware support, JFFS2 on NAND flash



N: Jérôme Glisse

Documentation/ABI/stable/sysfs-kernel-time-aux-clocks

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What:		/sys/kernel/time/aux_clocks/<ID>/enable

Date:		May 2025

Contact:	Thomas Gleixner <tglx@linutronix.de>

Contact:	Thomas Gleixner <tglx@kernel.org>

Description:

		Controls the enablement of auxiliary clock timekeepers.

Documentation/ABI/testing/sysfs-devices-soc

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@@ -17,14 +17,14 @@ Date: January 2012 
contact:	Lee Jones <lee@kernel.org>

Description:

		Read-only attribute common to all SoCs. Contains the SoC machine

		name (e.g. Ux500).

		name (e.g. DB8500).



What:		/sys/devices/socX/family

Date:		January 2012

contact:	Lee Jones <lee@kernel.org>

Description:

		Read-only attribute common to all SoCs. Contains SoC family name

		(e.g. DB8500).

		(e.g. ux500).



		On many of ARM based silicon with SMCCC v1.2+ compliant firmware

		this will contain the JEDEC JEP106 manufacturer’s identification

Documentation/arch/x86/topology.rst

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@@ -17,7 +17,7 @@ with the generic one and look at this one in parallel for the x86 specifics. 
Needless to say, code should use the generic functions - this file is *only*

here to *document* the inner workings of x86 topology.



Started by Thomas Gleixner <tglx@linutronix.de> and Borislav Petkov <bp@alien8.de>.

Started by Thomas Gleixner <tglx@kernel.org> and Borislav Petkov <bp@alien8.de>.



The main aim of the topology facilities is to present adequate interfaces to

code which needs to know/query/use the structure of the running system wrt