Commit 0fac5141 authored by Ben Skeggs's avatar Ben Skeggs Committed by Dave Airlie
Browse files

drm/nouveau/gsp: add display class ids to gpu hal 



Use display class IDs from nvkm_rm_gpu, instead of copying them from the
non-GSP HALs.

Removes the AD102 display HAL, which is no longer required as there's no
support for it without GSP-RM.

Signed-off-by: default avatarBen Skeggs <bskeggs@nvidia.com>
Reviewed-by: default avatarDave Airlie <airlied@redhat.com>
Reviewed-by: default avatarTimur Tabi <ttabi@nvidia.com>
Tested-by: default avatarTimur Tabi <ttabi@nvidia.com>
Signed-off-by: default avatarDave Airlie <airlied@redhat.com>
parent befe75ae

drivers/gpu/drm/nouveau/include/nvkm/engine/disp.h

+0 −1
Original line number Diff line number Diff line
@@ -87,5 +87,4 @@ int gp102_disp_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct 
int gv100_disp_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_disp **);

int tu102_disp_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_disp **);

int ga102_disp_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_disp **);

int ad102_disp_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_disp **);

#endif

drivers/gpu/drm/nouveau/nvkm/engine/device/base.c

+5 −5
Original line number Diff line number Diff line
@@ -2709,7 +2709,7 @@ nv192_chipset = { 
	.timer    = { 0x00000001, gk20a_timer_new },

	.vfn      = { 0x00000001, ga100_vfn_new },

	.ce       = { 0x0000001f, ga102_ce_new },

	.disp     = { 0x00000001, ad102_disp_new },

	.disp     = { 0x00000001, ga102_disp_new },

	.dma      = { 0x00000001, gv100_dma_new },

	.fifo     = { 0x00000001, ga102_fifo_new },

	.gr       = { 0x00000001, ad102_gr_new },
@@ -2735,7 +2735,7 @@ nv193_chipset = { 
	.timer    = { 0x00000001, gk20a_timer_new },

	.vfn      = { 0x00000001, ga100_vfn_new },

	.ce       = { 0x0000001f, ga102_ce_new },

	.disp     = { 0x00000001, ad102_disp_new },

	.disp     = { 0x00000001, ga102_disp_new },

	.dma      = { 0x00000001, gv100_dma_new },

	.fifo     = { 0x00000001, ga102_fifo_new },

	.gr       = { 0x00000001, ad102_gr_new },
@@ -2761,7 +2761,7 @@ nv194_chipset = { 
	.timer    = { 0x00000001, gk20a_timer_new },

	.vfn      = { 0x00000001, ga100_vfn_new },

	.ce       = { 0x0000001f, ga102_ce_new },

	.disp     = { 0x00000001, ad102_disp_new },

	.disp     = { 0x00000001, ga102_disp_new },

	.dma      = { 0x00000001, gv100_dma_new },

	.fifo     = { 0x00000001, ga102_fifo_new },

	.gr       = { 0x00000001, ad102_gr_new },
@@ -2787,7 +2787,7 @@ nv196_chipset = { 
	.timer    = { 0x00000001, gk20a_timer_new },

	.vfn      = { 0x00000001, ga100_vfn_new },

	.ce       = { 0x0000001f, ga102_ce_new },

	.disp     = { 0x00000001, ad102_disp_new },

	.disp     = { 0x00000001, ga102_disp_new },

	.dma      = { 0x00000001, gv100_dma_new },

	.fifo     = { 0x00000001, ga102_fifo_new },

	.gr       = { 0x00000001, ad102_gr_new },
@@ -2813,7 +2813,7 @@ nv197_chipset = { 
	.timer    = { 0x00000001, gk20a_timer_new },

	.vfn      = { 0x00000001, ga100_vfn_new },

	.ce       = { 0x0000001f, ga102_ce_new },

	.disp     = { 0x00000001, ad102_disp_new },

	.disp     = { 0x00000001, ga102_disp_new },

	.dma      = { 0x00000001, gv100_dma_new },

	.fifo     = { 0x00000001, ga102_fifo_new },

	.gr       = { 0x00000001, ad102_gr_new },

drivers/gpu/drm/nouveau/nvkm/engine/disp/Kbuild

+0 −1
Original line number Diff line number Diff line
@@ -27,7 +27,6 @@ nvkm-y += nvkm/engine/disp/gp102.o 
nvkm-y += nvkm/engine/disp/gv100.o

nvkm-y += nvkm/engine/disp/tu102.o

nvkm-y += nvkm/engine/disp/ga102.o

nvkm-y += nvkm/engine/disp/ad102.o



nvkm-y += nvkm/engine/disp/udisp.o

nvkm-y += nvkm/engine/disp/uconn.o

drivers/gpu/drm/nouveau/nvkm/engine/disp/ad102.c

deleted100644 → 0
+0 −52
Original line number Diff line number Diff line 
/*

 * Copyright 2023 Red Hat Inc.

 *

 * Permission is hereby granted, free of charge, to any person obtaining a

 * copy of this software and associated documentation files (the "Software"),

 * to deal in the Software without restriction, including without limitation

 * the rights to use, copy, modify, merge, publish, distribute, sublicense,

 * and/or sell copies of the Software, and to permit persons to whom the

 * Software is furnished to do so, subject to the following conditions:

 *

 * The above copyright notice and this permission notice shall be included in

 * all copies or substantial portions of the Software.

 *

 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR

 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,

 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL

 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR

 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,

 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR

 * OTHER DEALINGS IN THE SOFTWARE.

 */

#include "priv.h"

#include "chan.h"



#include <subdev/gsp.h>



#include <nvif/class.h>



static const struct nvkm_disp_func

ad102_disp = {

	.uevent = &gv100_disp_chan_uevent,

	.ramht_size = 0x2000,

	.root = {  0, 0,AD102_DISP },

	.user = {

		{{-1,-1,GV100_DISP_CAPS                  }, gv100_disp_caps_new },

		{{ 0, 0,GA102_DISP_CURSOR                }, nvkm_disp_chan_new, &gv100_disp_curs },

		{{ 0, 0,GA102_DISP_WINDOW_IMM_CHANNEL_DMA}, nvkm_disp_wndw_new, &gv100_disp_wimm },

		{{ 0, 0,AD102_DISP_CORE_CHANNEL_DMA      }, nvkm_disp_core_new, &gv100_disp_core },

		{{ 0, 0,GA102_DISP_WINDOW_CHANNEL_DMA    }, nvkm_disp_wndw_new, &gv100_disp_wndw },

		{}

	},

};



int

ad102_disp_new(struct nvkm_device *device, enum nvkm_subdev_type type, int inst,

	       struct nvkm_disp **pdisp)

{

	if (nvkm_gsp_rm(device->gsp))

		return r535_disp_new(&ad102_disp, device, type, inst, pdisp);



	return -ENODEV;

}

drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/ad10x.c

+10 −0
Original line number Diff line number Diff line
@@ -4,6 +4,16 @@ 
 */

#include "gpu.h"



#include <nvif/class.h>



const struct nvkm_rm_gpu

ad10x_gpu = {

	.disp.class = {

		.root = AD102_DISP,

		.caps = GV100_DISP_CAPS,

		.core = AD102_DISP_CORE_CHANNEL_DMA,

		.wndw = GA102_DISP_WINDOW_CHANNEL_DMA,

		.wimm = GA102_DISP_WINDOW_IMM_CHANNEL_DMA,

		.curs = GA102_DISP_CURSOR,

	},

};