Loading arch/sparc64/kernel/traps.c +6 −27 Original line number Diff line number Diff line Loading @@ -757,26 +757,12 @@ void __init cheetah_ecache_flush_init(void) ecache_flush_size = (2 * largest_size); ecache_flush_linesize = smallest_linesize; /* Discover a physically contiguous chunk of physical * memory in 'sp_banks' of size ecache_flush_size calculated * above. Store the physical base of this area at * ecache_flush_physbase. */ for (node = 0; ; node++) { if (sp_banks[node].num_bytes == 0) break; if (sp_banks[node].num_bytes >= ecache_flush_size) { ecache_flush_physbase = sp_banks[node].base_addr; break; } } ecache_flush_physbase = find_ecache_flush_span(ecache_flush_size); /* Note: Zero would be a valid value of ecache_flush_physbase so * don't use that as the success test. :-) */ if (sp_banks[node].num_bytes == 0) { if (ecache_flush_physbase == ~0UL) { prom_printf("cheetah_ecache_flush_init: Cannot find %d byte " "contiguous physical memory.\n", ecache_flush_size); "contiguous physical memory.\n", ecache_flush_size); prom_halt(); } Loading Loading @@ -1345,16 +1331,9 @@ static int cheetah_fix_ce(unsigned long physaddr) /* Return non-zero if PADDR is a valid physical memory address. */ static int cheetah_check_main_memory(unsigned long paddr) { int i; unsigned long vaddr = PAGE_OFFSET + paddr; for (i = 0; ; i++) { if (sp_banks[i].num_bytes == 0) break; if (paddr >= sp_banks[i].base_addr && paddr < (sp_banks[i].base_addr + sp_banks[i].num_bytes)) return 1; } return 0; return kern_addr_valid(vaddr); } void cheetah_cee_handler(struct pt_regs *regs, unsigned long afsr, unsigned long afar) Loading arch/sparc64/mm/fault.c +0 −2 Original line number Diff line number Diff line Loading @@ -32,8 +32,6 @@ #define ELEMENTS(arr) (sizeof (arr)/sizeof (arr[0])) extern struct sparc_phys_banks sp_banks[SPARC_PHYS_BANKS]; /* * To debug kernel to catch accesses to certain virtual/physical addresses. * Mode = 0 selects physical watchpoints, mode = 1 selects virtual watchpoints. Loading arch/sparc64/mm/init.c +22 −1 Original line number Diff line number Diff line Loading @@ -41,7 +41,14 @@ extern void device_scan(void); struct sparc_phys_banks sp_banks[SPARC_PHYS_BANKS]; struct sparc_phys_banks { unsigned long base_addr; unsigned long num_bytes; }; #define SPARC_PHYS_BANKS 32 static struct sparc_phys_banks sp_banks[SPARC_PHYS_BANKS]; unsigned long *sparc64_valid_addr_bitmap __read_mostly; Loading Loading @@ -1425,6 +1432,20 @@ void kernel_map_pages(struct page *page, int numpages, int enable) } #endif unsigned long __init find_ecache_flush_span(unsigned long size) { unsigned long i; for (i = 0; ; i++) { if (sp_banks[i].num_bytes == 0) break; if (sp_banks[i].num_bytes >= size) return sp_banks[i].base_addr; } return ~0UL; } static void __init prom_probe_memory(void) { struct linux_mlist_p1275 *mlist; Loading include/asm-sparc64/page.h +0 −17 Original line number Diff line number Diff line Loading @@ -140,23 +140,6 @@ extern unsigned long page_to_pfn(struct page *); #define virt_to_phys __pa #define phys_to_virt __va /* The following structure is used to hold the physical * memory configuration of the machine. This is filled in * probe_memory() and is later used by mem_init() to set up * mem_map[]. We statically allocate SPARC_PHYS_BANKS of * these structs, this is arbitrary. The entry after the * last valid one has num_bytes==0. */ struct sparc_phys_banks { unsigned long base_addr; unsigned long num_bytes; }; #define SPARC_PHYS_BANKS 32 extern struct sparc_phys_banks sp_banks[SPARC_PHYS_BANKS]; #endif /* !(__ASSEMBLY__) */ #define VM_DATA_DEFAULT_FLAGS (VM_READ | VM_WRITE | VM_EXEC | \ Loading include/asm-sparc64/pgtable.h +1 −0 Original line number Diff line number Diff line Loading @@ -342,6 +342,7 @@ extern pgd_t swapper_pg_dir[2048]; extern pmd_t swapper_low_pmd_dir[2048]; extern void paging_init(void); extern unsigned long find_ecache_flush_span(unsigned long size); /* These do nothing with the way I have things setup. */ #define mmu_lockarea(vaddr, len) (vaddr) Loading Loading
arch/sparc64/kernel/traps.c +6 −27 Original line number Diff line number Diff line Loading @@ -757,26 +757,12 @@ void __init cheetah_ecache_flush_init(void) ecache_flush_size = (2 * largest_size); ecache_flush_linesize = smallest_linesize; /* Discover a physically contiguous chunk of physical * memory in 'sp_banks' of size ecache_flush_size calculated * above. Store the physical base of this area at * ecache_flush_physbase. */ for (node = 0; ; node++) { if (sp_banks[node].num_bytes == 0) break; if (sp_banks[node].num_bytes >= ecache_flush_size) { ecache_flush_physbase = sp_banks[node].base_addr; break; } } ecache_flush_physbase = find_ecache_flush_span(ecache_flush_size); /* Note: Zero would be a valid value of ecache_flush_physbase so * don't use that as the success test. :-) */ if (sp_banks[node].num_bytes == 0) { if (ecache_flush_physbase == ~0UL) { prom_printf("cheetah_ecache_flush_init: Cannot find %d byte " "contiguous physical memory.\n", ecache_flush_size); "contiguous physical memory.\n", ecache_flush_size); prom_halt(); } Loading Loading @@ -1345,16 +1331,9 @@ static int cheetah_fix_ce(unsigned long physaddr) /* Return non-zero if PADDR is a valid physical memory address. */ static int cheetah_check_main_memory(unsigned long paddr) { int i; unsigned long vaddr = PAGE_OFFSET + paddr; for (i = 0; ; i++) { if (sp_banks[i].num_bytes == 0) break; if (paddr >= sp_banks[i].base_addr && paddr < (sp_banks[i].base_addr + sp_banks[i].num_bytes)) return 1; } return 0; return kern_addr_valid(vaddr); } void cheetah_cee_handler(struct pt_regs *regs, unsigned long afsr, unsigned long afar) Loading
arch/sparc64/mm/fault.c +0 −2 Original line number Diff line number Diff line Loading @@ -32,8 +32,6 @@ #define ELEMENTS(arr) (sizeof (arr)/sizeof (arr[0])) extern struct sparc_phys_banks sp_banks[SPARC_PHYS_BANKS]; /* * To debug kernel to catch accesses to certain virtual/physical addresses. * Mode = 0 selects physical watchpoints, mode = 1 selects virtual watchpoints. Loading
arch/sparc64/mm/init.c +22 −1 Original line number Diff line number Diff line Loading @@ -41,7 +41,14 @@ extern void device_scan(void); struct sparc_phys_banks sp_banks[SPARC_PHYS_BANKS]; struct sparc_phys_banks { unsigned long base_addr; unsigned long num_bytes; }; #define SPARC_PHYS_BANKS 32 static struct sparc_phys_banks sp_banks[SPARC_PHYS_BANKS]; unsigned long *sparc64_valid_addr_bitmap __read_mostly; Loading Loading @@ -1425,6 +1432,20 @@ void kernel_map_pages(struct page *page, int numpages, int enable) } #endif unsigned long __init find_ecache_flush_span(unsigned long size) { unsigned long i; for (i = 0; ; i++) { if (sp_banks[i].num_bytes == 0) break; if (sp_banks[i].num_bytes >= size) return sp_banks[i].base_addr; } return ~0UL; } static void __init prom_probe_memory(void) { struct linux_mlist_p1275 *mlist; Loading
include/asm-sparc64/page.h +0 −17 Original line number Diff line number Diff line Loading @@ -140,23 +140,6 @@ extern unsigned long page_to_pfn(struct page *); #define virt_to_phys __pa #define phys_to_virt __va /* The following structure is used to hold the physical * memory configuration of the machine. This is filled in * probe_memory() and is later used by mem_init() to set up * mem_map[]. We statically allocate SPARC_PHYS_BANKS of * these structs, this is arbitrary. The entry after the * last valid one has num_bytes==0. */ struct sparc_phys_banks { unsigned long base_addr; unsigned long num_bytes; }; #define SPARC_PHYS_BANKS 32 extern struct sparc_phys_banks sp_banks[SPARC_PHYS_BANKS]; #endif /* !(__ASSEMBLY__) */ #define VM_DATA_DEFAULT_FLAGS (VM_READ | VM_WRITE | VM_EXEC | \ Loading
include/asm-sparc64/pgtable.h +1 −0 Original line number Diff line number Diff line Loading @@ -342,6 +342,7 @@ extern pgd_t swapper_pg_dir[2048]; extern pmd_t swapper_low_pmd_dir[2048]; extern void paging_init(void); extern unsigned long find_ecache_flush_span(unsigned long size); /* These do nothing with the way I have things setup. */ #define mmu_lockarea(vaddr, len) (vaddr) Loading