Commit 104edc6e authored by Mario Limonciello's avatar Mario Limonciello Committed by Borislav Petkov (AMD)
Browse files

x86/cpufeatures: Rename X86_FEATURE_FAST_CPPC to have AMD prefix



This feature is an AMD unique feature of some processors, so put
AMD into the name.

Signed-off-by: default avatarMario Limonciello <mario.limonciello@amd.com>
Signed-off-by: default avatarBorislav Petkov (AMD) <bp@alien8.de>
Link: https://lore.kernel.org/r/20241025171459.1093-2-mario.limonciello@amd.com
parent f24f669d
Loading
Loading
Loading
Loading
+1 −1
Original line number Diff line number Diff line
@@ -472,7 +472,7 @@
#define X86_FEATURE_BHI_CTRL		(21*32+ 2) /* BHI_DIS_S HW control available */
#define X86_FEATURE_CLEAR_BHB_HW	(21*32+ 3) /* BHI_DIS_S HW control enabled */
#define X86_FEATURE_CLEAR_BHB_LOOP_ON_VMEXIT (21*32+ 4) /* Clear branch history at vmexit using SW loop */
#define X86_FEATURE_FAST_CPPC		(21*32 + 5) /* AMD Fast CPPC */
#define X86_FEATURE_AMD_FAST_CPPC	(21*32 + 5) /* Fast CPPC */

/*
 * BUG word(s)
+1 −1
Original line number Diff line number Diff line
@@ -45,7 +45,7 @@ static const struct cpuid_bit cpuid_bits[] = {
	{ X86_FEATURE_HW_PSTATE,	CPUID_EDX,  7, 0x80000007, 0 },
	{ X86_FEATURE_CPB,		CPUID_EDX,  9, 0x80000007, 0 },
	{ X86_FEATURE_PROC_FEEDBACK,    CPUID_EDX, 11, 0x80000007, 0 },
	{ X86_FEATURE_FAST_CPPC, 	CPUID_EDX, 15, 0x80000007, 0 },
	{ X86_FEATURE_AMD_FAST_CPPC,	CPUID_EDX, 15, 0x80000007, 0 },
	{ X86_FEATURE_MBA,		CPUID_EBX,  6, 0x80000008, 0 },
	{ X86_FEATURE_SMBA,		CPUID_EBX,  2, 0x80000020, 0 },
	{ X86_FEATURE_BMEC,		CPUID_EBX,  3, 0x80000020, 0 },
+1 −1
Original line number Diff line number Diff line
@@ -842,7 +842,7 @@ static u32 amd_pstate_get_transition_delay_us(unsigned int cpu)

	transition_delay_ns = cppc_get_transition_latency(cpu);
	if (transition_delay_ns == CPUFREQ_ETERNAL) {
		if (cpu_feature_enabled(X86_FEATURE_FAST_CPPC))
		if (cpu_feature_enabled(X86_FEATURE_AMD_FAST_CPPC))
			return AMD_PSTATE_FAST_CPPC_TRANSITION_DELAY;
		else
			return AMD_PSTATE_TRANSITION_DELAY;
+1 −1
Original line number Diff line number Diff line
@@ -472,7 +472,7 @@
#define X86_FEATURE_BHI_CTRL		(21*32+ 2) /* BHI_DIS_S HW control available */
#define X86_FEATURE_CLEAR_BHB_HW	(21*32+ 3) /* BHI_DIS_S HW control enabled */
#define X86_FEATURE_CLEAR_BHB_LOOP_ON_VMEXIT (21*32+ 4) /* Clear branch history at vmexit using SW loop */
#define X86_FEATURE_FAST_CPPC		(21*32 + 5) /* AMD Fast CPPC */
#define X86_FEATURE_AMD_FAST_CPPC		(21*32 + 5) /* AMD Fast CPPC */

/*
 * BUG word(s)