Commit 106172df authored by Rodrigo Siqueira's avatar Rodrigo Siqueira Committed by Alex Deucher
Browse files

drm/amdgpu/gfx: Use CSB helpers in gfx_v11_0_get_csb_buffer 



Part of the code in gfx_v11_0_get_csb_buffer can be removed in favor of
some GFX CSB helpers. This commit removes the duplicated part for the
GFX 11 CSB function.

Signed-off-by: default avatarRodrigo Siqueira <siqueira@igalia.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 9718f745

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

+5 −29
Original line number Diff line number Diff line
@@ -848,9 +848,7 @@ static u32 gfx_v11_0_get_csb_size(struct amdgpu_device *adev) 
static void gfx_v11_0_get_csb_buffer(struct amdgpu_device *adev,

				    volatile u32 *buffer)

{

	u32 count = 0, i;

	const struct cs_section_def *sect = NULL;

	const struct cs_extent_def *ext = NULL;

	u32 count = 0;

	int ctx_reg_offset;



	if (adev->gfx.rlc.cs_data == NULL)
@@ -858,37 +856,15 @@ static void gfx_v11_0_get_csb_buffer(struct amdgpu_device *adev, 
	if (buffer == NULL)

		return;



	buffer[count++] = cpu_to_le32(PACKET3(PACKET3_PREAMBLE_CNTL, 0));

	buffer[count++] = cpu_to_le32(PACKET3_PREAMBLE_BEGIN_CLEAR_STATE);



	buffer[count++] = cpu_to_le32(PACKET3(PACKET3_CONTEXT_CONTROL, 1));

	buffer[count++] = cpu_to_le32(0x80000000);

	buffer[count++] = cpu_to_le32(0x80000000);

	count = amdgpu_gfx_csb_preamble_start(buffer);

	count = amdgpu_gfx_csb_data_parser(adev, buffer, count);



	for (sect = adev->gfx.rlc.cs_data; sect->section != NULL; ++sect) {

		for (ext = sect->section; ext->extent != NULL; ++ext) {

			if (sect->id == SECT_CONTEXT) {

				buffer[count++] =

					cpu_to_le32(PACKET3(PACKET3_SET_CONTEXT_REG, ext->reg_count));

				buffer[count++] = cpu_to_le32(ext->reg_index -

						PACKET3_SET_CONTEXT_REG_START);

				for (i = 0; i < ext->reg_count; i++)

					buffer[count++] = cpu_to_le32(ext->extent[i]);

			}

		}

	}



	ctx_reg_offset =

		SOC15_REG_OFFSET(GC, 0, regPA_SC_TILE_STEERING_OVERRIDE) - PACKET3_SET_CONTEXT_REG_START;

	ctx_reg_offset = SOC15_REG_OFFSET(GC, 0, regPA_SC_TILE_STEERING_OVERRIDE) - PACKET3_SET_CONTEXT_REG_START;

	buffer[count++] = cpu_to_le32(PACKET3(PACKET3_SET_CONTEXT_REG, 1));

	buffer[count++] = cpu_to_le32(ctx_reg_offset);

	buffer[count++] = cpu_to_le32(adev->gfx.config.pa_sc_tile_steering_override);



	buffer[count++] = cpu_to_le32(PACKET3(PACKET3_PREAMBLE_CNTL, 0));

	buffer[count++] = cpu_to_le32(PACKET3_PREAMBLE_END_CLEAR_STATE);



	buffer[count++] = cpu_to_le32(PACKET3(PACKET3_CLEAR_STATE, 0));

	buffer[count++] = cpu_to_le32(0);

	amdgpu_gfx_csb_preamble_end(buffer, count);

}



static void gfx_v11_0_rlc_fini(struct amdgpu_device *adev)