Commit 117132ed authored by Dave Jiang's avatar Dave Jiang Committed by Dan Williams
Browse files

cxl/test: Add support for qos_class checking 



Set a fake qos_class to a unique value in order to do simple testing of
qos_class for root decoders and mem devs via user cxl_test. A mock
function is added to set the fake qos_class values for memory device
and overrides cxl_endpoint_parse_cdat() in cxl driver code.

Signed-off-by: default avatarDave Jiang <dave.jiang@intel.com>
Link: https://lore.kernel.org/r/20240206190431.1810289-5-dave.jiang@intel.com


Reviewed-by: default avatarJonathan Cameron <Jonathan.Cameron@huawei.com>
Signed-off-by: default avatarDan Williams <dan.j.williams@intel.com>
parent cc214417

tools/testing/cxl/Kbuild

+1 −0
Original line number Diff line number Diff line
@@ -13,6 +13,7 @@ ldflags-y += --wrap=cxl_hdm_decode_init 
ldflags-y += --wrap=cxl_dvsec_rr_decode

ldflags-y += --wrap=devm_cxl_add_rch_dport

ldflags-y += --wrap=cxl_rcd_component_reg_phys

ldflags-y += --wrap=cxl_endpoint_parse_cdat



DRIVERS := ../../../drivers

CXL_SRC := $(DRIVERS)/cxl

tools/testing/cxl/test/cxl.c

+54 −9
Original line number Diff line number Diff line
@@ -15,6 +15,8 @@ 


static int interleave_arithmetic;



#define FAKE_QTG_ID	42



#define NR_CXL_HOST_BRIDGES 2

#define NR_CXL_SINGLE_HOST 1

#define NR_CXL_RCH 1
@@ -209,7 +211,7 @@ static struct { 
			.granularity = 4,

			.restrictions = ACPI_CEDT_CFMWS_RESTRICT_TYPE3 |

					ACPI_CEDT_CFMWS_RESTRICT_VOLATILE,

			.qtg_id = 0,

			.qtg_id = FAKE_QTG_ID,

			.window_size = SZ_256M * 4UL,

		},

		.target = { 0 },
@@ -224,7 +226,7 @@ static struct { 
			.granularity = 4,

			.restrictions = ACPI_CEDT_CFMWS_RESTRICT_TYPE3 |

					ACPI_CEDT_CFMWS_RESTRICT_VOLATILE,

			.qtg_id = 1,

			.qtg_id = FAKE_QTG_ID,

			.window_size = SZ_256M * 8UL,

		},

		.target = { 0, 1, },
@@ -239,7 +241,7 @@ static struct { 
			.granularity = 4,

			.restrictions = ACPI_CEDT_CFMWS_RESTRICT_TYPE3 |

					ACPI_CEDT_CFMWS_RESTRICT_PMEM,

			.qtg_id = 2,

			.qtg_id = FAKE_QTG_ID,

			.window_size = SZ_256M * 4UL,

		},

		.target = { 0 },
@@ -254,7 +256,7 @@ static struct { 
			.granularity = 4,

			.restrictions = ACPI_CEDT_CFMWS_RESTRICT_TYPE3 |

					ACPI_CEDT_CFMWS_RESTRICT_PMEM,

			.qtg_id = 3,

			.qtg_id = FAKE_QTG_ID,

			.window_size = SZ_256M * 8UL,

		},

		.target = { 0, 1, },
@@ -269,7 +271,7 @@ static struct { 
			.granularity = 4,

			.restrictions = ACPI_CEDT_CFMWS_RESTRICT_TYPE3 |

					ACPI_CEDT_CFMWS_RESTRICT_PMEM,

			.qtg_id = 4,

			.qtg_id = FAKE_QTG_ID,

			.window_size = SZ_256M * 4UL,

		},

		.target = { 2 },
@@ -284,7 +286,7 @@ static struct { 
			.granularity = 4,

			.restrictions = ACPI_CEDT_CFMWS_RESTRICT_TYPE3 |

					ACPI_CEDT_CFMWS_RESTRICT_VOLATILE,

			.qtg_id = 5,

			.qtg_id = FAKE_QTG_ID,

			.window_size = SZ_256M,

		},

		.target = { 3 },
@@ -301,7 +303,7 @@ static struct { 
			.granularity = 4,

			.restrictions = ACPI_CEDT_CFMWS_RESTRICT_TYPE3 |

					ACPI_CEDT_CFMWS_RESTRICT_PMEM,

			.qtg_id = 0,

			.qtg_id = FAKE_QTG_ID,

			.window_size = SZ_256M * 8UL,

		},

		.target = { 0, },
@@ -317,7 +319,7 @@ static struct { 
			.granularity = 0,

			.restrictions = ACPI_CEDT_CFMWS_RESTRICT_TYPE3 |

					ACPI_CEDT_CFMWS_RESTRICT_PMEM,

			.qtg_id = 1,

			.qtg_id = FAKE_QTG_ID,

			.window_size = SZ_256M * 8UL,

		},

		.target = { 0, 1, },
@@ -333,7 +335,7 @@ static struct { 
			.granularity = 0,

			.restrictions = ACPI_CEDT_CFMWS_RESTRICT_TYPE3 |

					ACPI_CEDT_CFMWS_RESTRICT_PMEM,

			.qtg_id = 0,

			.qtg_id = FAKE_QTG_ID,

			.window_size = SZ_256M * 16UL,

		},

		.target = { 0, 1, 0, 1, },
@@ -976,6 +978,48 @@ static int mock_cxl_port_enumerate_dports(struct cxl_port *port) 
	return 0;

}



/*

 * Faking the cxl_dpa_perf for the memdev when appropriate.

 */

static void dpa_perf_setup(struct cxl_port *endpoint, struct range *range,

			   struct cxl_dpa_perf *dpa_perf)

{

	dpa_perf->qos_class = FAKE_QTG_ID;

	dpa_perf->dpa_range = *range;

	dpa_perf->coord.read_latency = 500;

	dpa_perf->coord.write_latency = 500;

	dpa_perf->coord.read_bandwidth = 1000;

	dpa_perf->coord.write_bandwidth = 1000;

}



static void mock_cxl_endpoint_parse_cdat(struct cxl_port *port)

{

	struct cxl_root *cxl_root __free(put_cxl_root) =

		find_cxl_root(port);

	struct cxl_memdev *cxlmd = to_cxl_memdev(port->uport_dev);

	struct cxl_dev_state *cxlds = cxlmd->cxlds;

	struct cxl_memdev_state *mds = to_cxl_memdev_state(cxlds);

	struct range pmem_range = {

		.start = cxlds->pmem_res.start,

		.end = cxlds->pmem_res.end,

	};

	struct range ram_range = {

		.start = cxlds->ram_res.start,

		.end = cxlds->ram_res.end,

	};



	if (!cxl_root)

		return;



	if (range_len(&ram_range))

		dpa_perf_setup(port, &ram_range, &mds->ram_perf);



	if (range_len(&pmem_range))

		dpa_perf_setup(port, &pmem_range, &mds->pmem_perf);



	cxl_memdev_update_perf(cxlmd);

}



static struct cxl_mock_ops cxl_mock_ops = {

	.is_mock_adev = is_mock_adev,

	.is_mock_bridge = is_mock_bridge,
@@ -989,6 +1033,7 @@ static struct cxl_mock_ops cxl_mock_ops = { 
	.devm_cxl_setup_hdm = mock_cxl_setup_hdm,

	.devm_cxl_add_passthrough_decoder = mock_cxl_add_passthrough_decoder,

	.devm_cxl_enumerate_decoders = mock_cxl_enumerate_decoders,

	.cxl_endpoint_parse_cdat = mock_cxl_endpoint_parse_cdat,

	.list = LIST_HEAD_INIT(cxl_mock_ops.list),

};

tools/testing/cxl/test/mock.c

+14 −0
Original line number Diff line number Diff line
@@ -285,6 +285,20 @@ resource_size_t __wrap_cxl_rcd_component_reg_phys(struct device *dev, 
}

EXPORT_SYMBOL_NS_GPL(__wrap_cxl_rcd_component_reg_phys, CXL);



void __wrap_cxl_endpoint_parse_cdat(struct cxl_port *port)

{

	int index;

	struct cxl_mock_ops *ops = get_cxl_mock_ops(&index);

	struct cxl_memdev *cxlmd = to_cxl_memdev(port->uport_dev);



	if (ops && ops->is_mock_dev(cxlmd->dev.parent))

		ops->cxl_endpoint_parse_cdat(port);

	else

		cxl_endpoint_parse_cdat(port);

	put_cxl_mock_ops(index);

}

EXPORT_SYMBOL_NS_GPL(__wrap_cxl_endpoint_parse_cdat, CXL);



MODULE_LICENSE("GPL v2");

MODULE_IMPORT_NS(ACPI);

MODULE_IMPORT_NS(CXL);

tools/testing/cxl/test/mock.h

+1 −0
Original line number Diff line number Diff line
@@ -25,6 +25,7 @@ struct cxl_mock_ops { 
	int (*devm_cxl_add_passthrough_decoder)(struct cxl_port *port);

	int (*devm_cxl_enumerate_decoders)(

		struct cxl_hdm *hdm, struct cxl_endpoint_dvsec_info *info);

	void (*cxl_endpoint_parse_cdat)(struct cxl_port *port);

};



void register_cxl_mock_ops(struct cxl_mock_ops *ops);