Commit 118bc846 authored by Marc Zyngier's avatar Marc Zyngier
Browse files

Merge branch kvm-arm64/pmu-unchained into kvmarm-master/next 



* kvm-arm64/pmu-unchained:
  : .
  : PMUv3 fixes and improvements:
  :
  : - Make the CHAIN event handling strictly follow the architecture
  :
  : - Add support for PMUv3p5 (64bit counters all the way)
  :
  : - Various fixes and cleanups
  : .
  KVM: arm64: PMU: Fix period computation for 64bit counters with 32bit overflow
  KVM: arm64: PMU: Sanitise PMCR_EL0.LP on first vcpu run
  KVM: arm64: PMU: Simplify PMCR_EL0 reset handling
  KVM: arm64: PMU: Replace version number '0' with ID_AA64DFR0_EL1_PMUVer_NI
  KVM: arm64: PMU: Make kvm_pmc the main data structure
  KVM: arm64: PMU: Simplify vcpu computation on perf overflow notification
  KVM: arm64: PMU: Allow PMUv3p5 to be exposed to the guest
  KVM: arm64: PMU: Implement PMUv3p5 long counter support
  KVM: arm64: PMU: Allow ID_DFR0_EL1.PerfMon to be set from userspace
  KVM: arm64: PMU: Allow ID_AA64DFR0_EL1.PMUver to be set from userspace
  KVM: arm64: PMU: Move the ID_AA64DFR0_EL1.PMUver limit to VM creation
  KVM: arm64: PMU: Do not let AArch32 change the counters' top 32 bits
  KVM: arm64: PMU: Simplify setting a counter to a specific value
  KVM: arm64: PMU: Add counter_index_to_*reg() helpers
  KVM: arm64: PMU: Only narrow counters that are not 64bit wide
  KVM: arm64: PMU: Narrow the overflow checking when required
  KVM: arm64: PMU: Distinguish between 64bit counter and 64bit overflow
  KVM: arm64: PMU: Always advertise the CHAIN event
  KVM: arm64: PMU: Align chained counter implementation with architecture pseudocode
  arm64: Add ID_DFR0_EL1.PerfMon values for PMUv3p7 and IMP_DEF

Signed-off-by: default avatarMarc Zyngier <maz@kernel.org>
parents 382b5b87 58ff6569

arch/arm64/include/asm/kvm_host.h

+4 −0
Original line number Diff line number Diff line
@@ -227,6 +227,10 @@ struct kvm_arch { 


	u8 pfr0_csv2;

	u8 pfr0_csv3;

	struct {

		u8 imp:4;

		u8 unimp:4;

	} dfr0_pmuver;



	/* Hypercall features firmware registers' descriptor */

	struct kvm_smccc_features smccc_feat;

arch/arm64/include/asm/sysreg.h

+2 −0
Original line number Diff line number Diff line
@@ -698,6 +698,8 @@ 
#define ID_DFR0_PERFMON_8_1		0x4

#define ID_DFR0_PERFMON_8_4		0x5

#define ID_DFR0_PERFMON_8_5		0x6

#define ID_DFR0_PERFMON_8_7		0x7

#define ID_DFR0_PERFMON_IMP_DEF		0xf



#define ID_ISAR4_SWP_FRAC_SHIFT		28

#define ID_ISAR4_PSR_M_SHIFT		24

arch/arm64/kvm/arm.c

+6 −0
Original line number Diff line number Diff line
@@ -164,6 +164,12 @@ int kvm_arch_init_vm(struct kvm *kvm, unsigned long type) 
	set_default_spectre(kvm);

	kvm_arm_init_hypercalls(kvm);



	/*

	 * Initialise the default PMUver before there is a chance to

	 * create an actual PMU.

	 */

	kvm->arch.dfr0_pmuver.imp = kvm_arm_pmu_get_pmuver_limit();



	return 0;



err_free_cpumask:

arch/arm64/kvm/pmu-emul.c

+196 −286

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arch/arm64/kvm/sys_regs.c

+135 −22

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