Commit 119b225f authored by Dave Airlie's avatar Dave Airlie
Browse files

Merge tag 'amd-drm-next-6.9-2024-03-08-1' of... 

Merge tag 'amd-drm-next-6.9-2024-03-08-1' of https://gitlab.freedesktop.org/agd5f/linux

 into drm-next

amd-drm-next-6.9-2024-03-08-1:

amdgpu:
- DCN 3.5.1 support
- Fixes for IOMMUv2 removal
- UAF fix
- Misc small fixes and cleanups
- SR-IOV fixes
- MCBP cleanup
- devcoredump update
- NBIF 6.3.1 support
- VPE 6.1.1 support

amdkfd:
- Misc fixes and cleanups
- GFX10.1 trap fixes

Signed-off-by: default avatarDave Airlie <airlied@redhat.com>

From: Alex Deucher <alexander.deucher@amd.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240308170741.3691166-1-alexander.deucher@amd.com
parents b9511c6d 5eabf0cd

drivers/gpu/drm/amd/amdgpu/Makefile

+1 −1
Original line number Diff line number Diff line
@@ -98,7 +98,7 @@ amdgpu-y += \ 
	vega20_reg_init.o nbio_v7_4.o nbio_v2_3.o nv.o arct_reg_init.o mxgpu_nv.o \

	nbio_v7_2.o hdp_v4_0.o hdp_v5_0.o aldebaran_reg_init.o aldebaran.o soc21.o \

	sienna_cichlid.o smu_v13_0_10.o nbio_v4_3.o hdp_v6_0.o nbio_v7_7.o hdp_v5_2.o lsdma_v6_0.o \

	nbio_v7_9.o aqua_vanjaram.o nbio_v7_11.o lsdma_v7_0.o hdp_v7_0.o

	nbio_v7_9.o aqua_vanjaram.o nbio_v7_11.o lsdma_v7_0.o hdp_v7_0.o nbif_v6_3_1.o



# add DF block

amdgpu-y += \

drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c

+7 −2
Original line number Diff line number Diff line
@@ -1782,9 +1782,14 @@ static int amdgpu_debugfs_vm_info_show(struct seq_file *m, void *unused) 
	list_for_each_entry(file, &dev->filelist, lhead) {

		struct amdgpu_fpriv *fpriv = file->driver_priv;

		struct amdgpu_vm *vm = &fpriv->vm;

		struct amdgpu_task_info *ti;



		ti = amdgpu_vm_get_task_info_vm(vm);

		if (ti) {

			seq_printf(m, "pid:%d\tProcess:%s ----------\n", ti->pid, ti->process_name);

			amdgpu_vm_put_task_info(ti);

		}



		seq_printf(m, "pid:%d\tProcess:%s ----------\n",

				vm->task_info.pid, vm->task_info.process_name);

		r = amdgpu_bo_reserve(vm->root.bo, true);

		if (r)

			break;

drivers/gpu/drm/amd/amdgpu/amdgpu_device.c

+2 −2
Original line number Diff line number Diff line
@@ -4056,13 +4056,13 @@ int amdgpu_device_init(struct amdgpu_device *adev, 
		goto unmap_memory;

	}



	amdgpu_device_set_mcbp(adev);



	/* early init functions */

	r = amdgpu_device_ip_early_init(adev);

	if (r)

		goto unmap_memory;



	amdgpu_device_set_mcbp(adev);



	/* Get rid of things like offb */

	r = drm_aperture_remove_conflicting_pci_framebuffers(adev->pdev, &amdgpu_kms_driver);

	if (r)

drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c

+16 −0
Original line number Diff line number Diff line
@@ -61,6 +61,7 @@ 
#include "nbio_v4_3.h"

#include "nbio_v7_2.h"

#include "nbio_v7_7.h"

#include "nbif_v6_3_1.h"

#include "hdp_v5_0.h"

#include "hdp_v5_2.h"

#include "hdp_v6_0.h"
@@ -1319,6 +1320,15 @@ static int amdgpu_discovery_reg_base_init(struct amdgpu_device *adev) 
				}

			}



			if (le16_to_cpu(ip->hw_id) == VPE_HWID) {

				if (adev->vpe.num_instances < AMDGPU_MAX_VPE_INSTANCES)

					adev->vpe.num_instances++;

				else

					dev_err(adev->dev, "Too many VPE instances: %d vs %d\n",

						adev->vpe.num_instances + 1,

						AMDGPU_MAX_VPE_INSTANCES);

			}



			if (le16_to_cpu(ip->hw_id) == UMC_HWID) {

				adev->gmc.num_umc++;

				adev->umc.node_inst_num++;
@@ -1936,6 +1946,7 @@ static int amdgpu_discovery_set_display_ip_blocks(struct amdgpu_device *adev) 
		case IP_VERSION(3, 2, 0):

		case IP_VERSION(3, 2, 1):

		case IP_VERSION(3, 5, 0):

		case IP_VERSION(3, 5, 1):

			if (amdgpu_sriov_vf(adev))

				amdgpu_discovery_set_sriov_display(adev);

			else
@@ -2212,6 +2223,7 @@ static int amdgpu_discovery_set_vpe_ip_blocks(struct amdgpu_device *adev) 
{

	switch (amdgpu_ip_version(adev, VPE_HWIP, 0)) {

	case IP_VERSION(6, 1, 0):

	case IP_VERSION(6, 1, 1):

		amdgpu_device_ip_block_add(adev, &vpe_v6_1_ip_block);

		break;

	default:
@@ -2558,6 +2570,10 @@ int amdgpu_discovery_set_ip_blocks(struct amdgpu_device *adev) 
		adev->nbio.funcs = &nbio_v7_7_funcs;

		adev->nbio.hdp_flush_reg = &nbio_v7_7_hdp_flush_reg;

		break;

	case IP_VERSION(6, 3, 1):

		adev->nbio.funcs = &nbif_v6_3_1_funcs;

		adev->nbio.hdp_flush_reg = &nbif_v6_3_1_hdp_flush_reg;

		break;

	default:

		break;

	}

drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c

+12 −12
Original line number Diff line number Diff line
@@ -2693,7 +2693,7 @@ static int amdgpu_pmops_runtime_suspend(struct device *dev) 
	}



	adev->in_runpm = true;

	if (amdgpu_device_supports_px(drm_dev))

	if (adev->pm.rpm_mode == AMDGPU_RUNPM_PX)

		drm_dev->switch_power_state = DRM_SWITCH_POWER_CHANGING;



	/*
@@ -2703,7 +2703,7 @@ static int amdgpu_pmops_runtime_suspend(struct device *dev) 
	 * platforms.

	 * TODO: this may be also needed for PX capable platform.

	 */

	if (amdgpu_device_supports_boco(drm_dev))

	if (adev->pm.rpm_mode == AMDGPU_RUNPM_BOCO)

		adev->mp1_state = PP_MP1_STATE_UNLOAD;



	ret = amdgpu_device_prepare(drm_dev);
@@ -2712,15 +2712,15 @@ static int amdgpu_pmops_runtime_suspend(struct device *dev) 
	ret = amdgpu_device_suspend(drm_dev, false);

	if (ret) {

		adev->in_runpm = false;

		if (amdgpu_device_supports_boco(drm_dev))

		if (adev->pm.rpm_mode == AMDGPU_RUNPM_BOCO)

			adev->mp1_state = PP_MP1_STATE_NONE;

		return ret;

	}



	if (amdgpu_device_supports_boco(drm_dev))

	if (adev->pm.rpm_mode == AMDGPU_RUNPM_BOCO)

		adev->mp1_state = PP_MP1_STATE_NONE;



	if (amdgpu_device_supports_px(drm_dev)) {

	if (adev->pm.rpm_mode == AMDGPU_RUNPM_PX) {

		/* Only need to handle PCI state in the driver for ATPX

		 * PCI core handles it for _PR3.

		 */
@@ -2729,9 +2729,9 @@ static int amdgpu_pmops_runtime_suspend(struct device *dev) 
		pci_ignore_hotplug(pdev);

		pci_set_power_state(pdev, PCI_D3cold);

		drm_dev->switch_power_state = DRM_SWITCH_POWER_DYNAMIC_OFF;

	} else if (amdgpu_device_supports_boco(drm_dev)) {

	} else if (adev->pm.rpm_mode == AMDGPU_RUNPM_BOCO) {

		/* nothing to do */

	} else if (amdgpu_device_supports_baco(drm_dev)) {

	} else if (adev->pm.rpm_mode == AMDGPU_RUNPM_BACO) {

		amdgpu_device_baco_enter(drm_dev);

	}
@@ -2754,7 +2754,7 @@ static int amdgpu_pmops_runtime_resume(struct device *dev) 
	if (!pci_device_is_present(adev->pdev))

		adev->no_hw_access = true;



	if (amdgpu_device_supports_px(drm_dev)) {

	if (adev->pm.rpm_mode == AMDGPU_RUNPM_PX) {

		drm_dev->switch_power_state = DRM_SWITCH_POWER_CHANGING;



		/* Only need to handle PCI state in the driver for ATPX
@@ -2766,22 +2766,22 @@ static int amdgpu_pmops_runtime_resume(struct device *dev) 
		if (ret)

			return ret;

		pci_set_master(pdev);

	} else if (amdgpu_device_supports_boco(drm_dev)) {

	} else if (adev->pm.rpm_mode == AMDGPU_RUNPM_BOCO) {

		/* Only need to handle PCI state in the driver for ATPX

		 * PCI core handles it for _PR3.

		 */

		pci_set_master(pdev);

	} else if (amdgpu_device_supports_baco(drm_dev)) {

	} else if (adev->pm.rpm_mode == AMDGPU_RUNPM_BACO) {

		amdgpu_device_baco_exit(drm_dev);

	}

	ret = amdgpu_device_resume(drm_dev, false);

	if (ret) {

		if (amdgpu_device_supports_px(drm_dev))

		if (adev->pm.rpm_mode == AMDGPU_RUNPM_PX)

			pci_disable_device(pdev);

		return ret;

	}



	if (amdgpu_device_supports_px(drm_dev))

	if (adev->pm.rpm_mode == AMDGPU_RUNPM_PX)

		drm_dev->switch_power_state = DRM_SWITCH_POWER_ON;

	adev->in_runpm = false;

	return 0;