Commit 11a2407e authored by Balasubramani Vivekanandan's avatar Balasubramani Vivekanandan Committed by Rodrigo Vivi
Browse files

drm/xe: Stop accepting value in xe_migrate_clear 



Although xe_migrate_clear() has a value argument, currently the driver
is only passing 0 at all the places this function is invoked with the
exception the kunit tests are using the parameter to validate this
function with different values.
xe_migrate_clear() is failing on platforms with link copy engines
because xe_migrate_clear() via emit_clear() is using the blitter
instruction XY_FAST_COLOR_BLT to clear the memory. But this instruction
is not supported by link copy engine.
So the solution is to use the alternate instruction MEM_SET when
platform contains link copy engine. But MEM_SET instruction accepts only
8-bit value for setting whereas the value agrument of xe_migrate_clear()
is 32-bit.
So instead of spreading this limitation around all invocations of
xe_migrate_clear() and causing more confusion, it was decided to not
accept any value itself as driver does not really need this currently.

All the kunit tests are adapted as per the new function prototype.

This will be followed by a patch to add support for link copy engines.

Signed-off-by: default avatarBalasubramani Vivekanandan <balasubramani.vivekanandan@intel.com>
Reviewed-by: default avatarLucas De Marchi <lucas.demarchi@intel.com>
Signed-off-by: default avatarRodrigo Vivi <rodrigo.vivi@intel.com>
parent eb230dc4

drivers/gpu/drm/xe/regs/xe_gpu_commands.h

+9 −0
Original line number Diff line number Diff line
@@ -6,6 +6,8 @@ 
#ifndef _XE_GPU_COMMANDS_H_

#define _XE_GPU_COMMANDS_H_



#include "regs/xe_reg_defs.h"



#define INSTR_CLIENT_SHIFT      29

#define   INSTR_MI_CLIENT       0x0

#define __INSTR(client) ((client) << INSTR_CLIENT_SHIFT)
@@ -56,6 +58,13 @@ 
#define GEN9_XY_FAST_COPY_BLT_CMD	(2 << 29 | 0x42 << 22)

#define   BLT_DEPTH_32			(3<<24)



#define	PVC_MEM_SET_CMD		(2 << 29 | 0x5b << 22)

#define   PVC_MEM_SET_CMD_LEN_DW	7

#define   PVC_MS_MATRIX			REG_BIT(17)

#define   PVC_MS_DATA_FIELD		GENMASK(31, 24)

/* Bspec lists field as [6:0], but index alone is from [6:1] */

#define   PVC_MS_MOCS_INDEX_MASK	GENMASK(6, 1)



#define GFX_OP_PIPE_CONTROL(len)	((0x3<<29)|(0x3<<27)|(0x2<<24)|((len)-2))

#define   PIPE_CONTROL_TILE_CACHE_FLUSH			(1<<28)

#define   PIPE_CONTROL_AMFS_FLUSH			(1<<25)

drivers/gpu/drm/xe/tests/xe_bo.c

+1 −1
Original line number Diff line number Diff line
@@ -32,7 +32,7 @@ static int ccs_test_migrate(struct xe_gt *gt, struct xe_bo *bo, 


	/* Optionally clear bo *and* CCS data in VRAM. */

	if (clear) {

		fence = xe_migrate_clear(gt->migrate, bo, bo->ttm.resource, 0);

		fence = xe_migrate_clear(gt->migrate, bo, bo->ttm.resource);

		if (IS_ERR(fence)) {

			KUNIT_FAIL(test, "Failed to submit bo clear.\n");

			return PTR_ERR(fence);

drivers/gpu/drm/xe/tests/xe_migrate.c

+9 −9
Original line number Diff line number Diff line
@@ -99,7 +99,7 @@ static void test_copy(struct xe_migrate *m, struct xe_bo *bo, 
		      struct kunit *test)

{

	struct xe_device *xe = gt_to_xe(m->gt);

	u64 retval, expected = 0xc0c0c0c0c0c0c0c0ULL;

	u64 retval, expected = 0;

	bool big = bo->size >= SZ_2M;

	struct dma_fence *fence;

	const char *str = big ? "Copying big bo" : "Copying small bo";
@@ -130,7 +130,7 @@ static void test_copy(struct xe_migrate *m, struct xe_bo *bo, 
	}



	xe_map_memset(xe, &sysmem->vmap, 0, 0xd0, sysmem->size);

	fence = xe_migrate_clear(m, sysmem, sysmem->ttm.resource, 0xc0c0c0c0);

	fence = xe_migrate_clear(m, sysmem, sysmem->ttm.resource);

	if (!sanity_fence_failed(xe, fence, big ? "Clearing sysmem big bo" :

				 "Clearing sysmem small bo", test)) {

		retval = xe_map_rd(xe, &sysmem->vmap, 0, u64);
@@ -311,10 +311,10 @@ static void xe_migrate_sanity_test(struct xe_migrate *m, struct kunit *test) 
	bb->len = 0;

	bb->cs[bb->len++] = MI_BATCH_BUFFER_END;

	xe_map_wr(xe, &pt->vmap, 0, u32, 0xdeaddead);

	expected = 0x12345678U;

	expected = 0;



	emit_clear(m->gt, bb, xe_migrate_vm_addr(NUM_KERNEL_PDE - 1, 0), 4, 4,

		   expected, IS_DGFX(xe));

		   IS_DGFX(xe));

	run_sanity_job(m, xe, bb, 1, "Writing to our newly mapped pagetable",

		       test);
@@ -326,8 +326,8 @@ static void xe_migrate_sanity_test(struct xe_migrate *m, struct kunit *test) 
	/* Clear a small bo */

	kunit_info(test, "Clearing small buffer object\n");

	xe_map_memset(xe, &tiny->vmap, 0, 0x22, tiny->size);

	expected = 0x224488ff;

	fence = xe_migrate_clear(m, tiny, tiny->ttm.resource, expected);

	expected = 0;

	fence = xe_migrate_clear(m, tiny, tiny->ttm.resource);

	if (sanity_fence_failed(xe, fence, "Clearing small bo", test))

		goto out;
@@ -342,11 +342,11 @@ static void xe_migrate_sanity_test(struct xe_migrate *m, struct kunit *test) 
		test_copy(m, tiny, test);

	}



	/* Clear a big bo with a fixed value */

	/* Clear a big bo */

	kunit_info(test, "Clearing big buffer object\n");

	xe_map_memset(xe, &big->vmap, 0, 0x11, big->size);

	expected = 0x11223344U;

	fence = xe_migrate_clear(m, big, big->ttm.resource, expected);

	expected = 0;

	fence = xe_migrate_clear(m, big, big->ttm.resource);

	if (sanity_fence_failed(xe, fence, "Clearing big bo", test))

		goto out;

drivers/gpu/drm/xe/xe_bo.c

+1 −1
Original line number Diff line number Diff line
@@ -686,7 +686,7 @@ static int xe_bo_move(struct ttm_buffer_object *ttm_bo, bool evict, 
		}

	} else {

		if (move_lacks_source)

			fence = xe_migrate_clear(gt->migrate, bo, new_mem, 0);

			fence = xe_migrate_clear(gt->migrate, bo, new_mem);

		else

			fence = xe_migrate_copy(gt->migrate, bo, old_mem, new_mem);

		if (IS_ERR(fence)) {

drivers/gpu/drm/xe/xe_device_types.h

+2 −0
Original line number Diff line number Diff line
@@ -89,6 +89,8 @@ struct xe_device { 
		bool has_4tile;

		/** @has_range_tlb_invalidation: Has range based TLB invalidations */

		bool has_range_tlb_invalidation;

		/** @has_link_copy_engines: Whether the platform has link copy engines */

		bool has_link_copy_engine;

	} info;



	/** @irq: device interrupt state */