Unverified Commit 124f6155 authored by Biju Das's avatar Biju Das Committed by Mark Brown
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ASoC: renesas: rz-ssi: Add support for 32 bits sample width 



Add support for 32 bits sample format width for RZ/G2L SoCs.

Signed-off-by: default avatarBiju Das <biju.das.jz@bp.renesas.com>
Link: https://patch.msgid.link/20251114075856.4751-6-biju.das.jz@bp.renesas.com


Signed-off-by: default avatarMark Brown <broonie@kernel.org>
parent 9e10709f

sound/soc/renesas/rz-ssi.c

+7 −3
Original line number Diff line number Diff line
@@ -75,7 +75,8 @@ 
#define PREALLOC_BUFFER_MAX	(SZ_32K)



#define SSI_RATES		SNDRV_PCM_RATE_8000_48000 /* 8k-48kHz */

#define SSI_FMTS		(SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S24_LE)

#define SSI_FMTS		(SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S24_LE | \

				 SNDRV_PCM_FMTBIT_S32_LE)

#define SSI_CHAN_MIN		2

#define SSI_CHAN_MAX		2

#define SSI_FIFO_DEPTH		32
@@ -295,7 +296,7 @@ static int rz_ssi_clk_setup(struct rz_ssi_priv *ssi, unsigned int rate, 
	}



	/*

	 * DWL: Data Word Length = {16, 24} bits

	 * DWL: Data Word Length = {16, 24, 32} bits

	 * SWL: System Word Length = 32 bits

	 */

	ssicr |= SSICR_CKDV(clk_ckdv);
@@ -306,6 +307,9 @@ static int rz_ssi_clk_setup(struct rz_ssi_priv *ssi, unsigned int rate, 
	case 24:

		ssicr |= SSICR_DWL(5) | SSICR_PDTA;

		break;

	case 32:

		ssicr |= SSICR_DWL(6);

		break;

	default:

		dev_err(ssi->dev, "Not support %u data width",

			ssi->hw_params_cache.sample_width);
@@ -1016,7 +1020,7 @@ static int rz_ssi_dai_hw_params(struct snd_pcm_substream *substream, 
	unsigned int rate = params_rate(params);

	int ret;



	if (!(sample_bits == 16 || sample_bits == 24)) {

	if (!(sample_bits == 16 || sample_bits == 24 || sample_bits == 32)) {

		dev_err(ssi->dev, "Unsupported sample width: %d\n",

			sample_bits);

		return -EINVAL;