Commit 1282157a authored by Chris Packham's avatar Chris Packham Committed by Bartosz Golaszewski
Browse files

dt-bindings: gpio: gpio-mvebu: convert txt binding to DT schema format 



Convert the existing device tree binding to DT schema format.

The old binding listed the interrupt-controller and related properties
as required but there are sufficiently many existing usages without it
that the YAML binding does not make the interrupt properties required.

Signed-off-by: default avatarChris Packham <chris.packham@alliedtelesis.co.nz>
Reviewed-by: default avatarAndrew Lunn <andrew@lunn.ch>
Reviewed-by: default avatarKrzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: default avatarBartosz Golaszewski <brgl@bgdev.pl>
parent 2b038e78

Documentation/devicetree/bindings/arm/marvell/ap80x-system-controller.txt

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@@ -72,7 +72,7 @@ mpp19 19 gpio, uart0(rxd), sdio(pw_off) 
GPIO:

-----

For common binding part and usage, refer to

Documentation/devicetree/bindings/gpio/gpio-mvebu.txt.

Documentation/devicetree/bindings/gpio/gpio-mvebu.yaml.



Required properties:

Documentation/devicetree/bindings/arm/marvell/cp110-system-controller.txt

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@@ -156,7 +156,7 @@ GPIO: 
-----



For common binding part and usage, refer to

Documentation/devicetree/bindings/gpio/gpio-mvebu.txt.

Documentation/devicetree/bindings/gpio/gpio-mvebu.yaml.



Required properties:

Documentation/devicetree/bindings/gpio/gpio-mvebu.txt

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* Marvell EBU GPIO controller



Required properties:



- compatible : Should be "marvell,orion-gpio", "marvell,mv78200-gpio",

  "marvell,armadaxp-gpio" or "marvell,armada-8k-gpio".



    "marvell,orion-gpio" should be used for Orion, Kirkwood, Dove,

    Discovery (except MV78200) and Armada 370. "marvell,mv78200-gpio"

    should be used for the Discovery MV78200.



    "marvel,armadaxp-gpio" should be used for all Armada XP SoCs

    (MV78230, MV78260, MV78460).



    "marvell,armada-8k-gpio" should be used for the Armada 7K and 8K

    SoCs (either from AP or CP), see

    Documentation/devicetree/bindings/arm/marvell/ap80x-system-controller.txt

    for specific details about the offset property.



- reg: Address and length of the register set for the device. Only one

  entry is expected, except for the "marvell,armadaxp-gpio" variant

  for which two entries are expected: one for the general registers,

  one for the per-cpu registers. Not used for marvell,armada-8k-gpio.



- interrupts: The list of interrupts that are used for all the pins

  managed by this GPIO bank. There can be more than one interrupt

  (example: 1 interrupt per 8 pins on Armada XP, which means 4

  interrupts per bank of 32 GPIOs).



- interrupt-controller: identifies the node as an interrupt controller



- #interrupt-cells: specifies the number of cells needed to encode an

  interrupt source. Should be two.

  The first cell is the GPIO number.

  The second cell is used to specify flags:

    bits[3:0] trigger type and level flags:

      1 = low-to-high edge triggered.

      2 = high-to-low edge triggered.

      4 = active high level-sensitive.

      8 = active low level-sensitive.



- gpio-controller: marks the device node as a gpio controller



- ngpios: number of GPIOs this controller has



- #gpio-cells: Should be two. The first cell is the pin number. The

  second cell is reserved for flags, unused at the moment.



Optional properties:



In order to use the GPIO lines in PWM mode, some additional optional

properties are required.



- compatible: Must contain "marvell,armada-370-gpio"



- reg: an additional register set is needed, for the GPIO Blink

  Counter on/off registers.



- reg-names: Must contain an entry "pwm" corresponding to the

  additional register range needed for PWM operation.



- #pwm-cells: Should be two. The first cell is the GPIO line number. The

  second cell is the period in nanoseconds.



- clocks: Must be a phandle to the clock for the GPIO controller.



Example:



		gpio0: gpio@d0018100 {

			compatible = "marvell,armadaxp-gpio";

			reg = <0xd0018100 0x40>,

			    <0xd0018800 0x30>;

			ngpios = <32>;

			gpio-controller;

			#gpio-cells = <2>;

			interrupt-controller;

			#interrupt-cells = <2>;

			interrupts = <16>, <17>, <18>, <19>;

		};



		gpio1: gpio@18140 {

			compatible = "marvell,armada-370-gpio";

			reg = <0x18140 0x40>, <0x181c8 0x08>;

			reg-names = "gpio", "pwm";

			ngpios = <17>;

			gpio-controller;

			#gpio-cells = <2>;

			#pwm-cells = <2>;

			interrupt-controller;

			#interrupt-cells = <2>;

			interrupts = <87>, <88>, <89>;

			clocks = <&coreclk 0>;

		};

Documentation/devicetree/bindings/gpio/gpio-mvebu.yaml

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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)

%YAML 1.2

---

$id: http://devicetree.org/schemas/gpio/gpio-mvebu.yaml#

$schema: http://devicetree.org/meta-schemas/core.yaml#



title: Marvell EBU GPIO controller



maintainers:

  - Thomas Petazzoni <thomas.petazzoni@free-electrons.com>

  - Andrew Lunn <andrew@lunn.ch>



properties:

  compatible:

    oneOf:

      - enum:

          - marvell,armada-8k-gpio

          - marvell,orion-gpio



      - items:

          - enum:

              - marvell,mv78200-gpio

              - marvell,armada-370-gpio

              - marvell,armadaxp-gpio

          - const: marvell,orion-gpio



  reg:

    description: |

      Address and length of the register set for the device. Not used for

      marvell,armada-8k-gpio.



      For the "marvell,armadaxp-gpio" variant a second entry is expected for

      the per-cpu registers. For other variants second entry can be provided,

      for the PWM function using the GPIO Blink Counter on/off registers.

    minItems: 1

    maxItems: 2



  reg-names:

    items:

      - const: gpio

      - const: pwm

    minItems: 1



  interrupts:

    description: |

      The list of interrupts that are used for all the pins managed by this

      GPIO bank. There can be more than one interrupt (example: 1 interrupt

      per 8 pins on Armada XP, which means 4 interrupts per bank of 32

      GPIOs).

    minItems: 1

    maxItems: 4



  interrupt-controller: true



  "#interrupt-cells":

    const: 2



  gpio-controller: true



  ngpios:

    minimum: 1

    maximum: 32



  "#gpio-cells":

    const: 2



  "#pwm-cells":

    description:

      The first cell is the GPIO line number. The second cell is the period

      in nanoseconds.

    const: 2



  clocks:

    description:

      Clock(s) used for PWM function.

    items:

      - description: Core clock

      - description: AXI bus clock

    minItems: 1



  clock-names:

    items:

      - const: core

      - const: axi

    minItems: 1



required:

  - compatible

  - gpio-controller

  - ngpios

  - "#gpio-cells"



allOf:

  - if:

      properties:

        compatible:

          contains:

            const: marvell,armada-8k-gpio

    then:

      required:

        - offset

    else:

      required:

        - reg



  - if:

      properties:

        compatible:

          contains:

            const: marvell,armadaxp-gpio

    then:

      properties:

        reg:

          minItems: 2

        reg-names:

          minItems: 2



unevaluatedProperties: true



examples:

  - |

    gpio@d0018100 {

      compatible = "marvell,armadaxp-gpio", "marvell,orion-gpio";

      reg = <0xd0018100 0x40>, <0xd0018800 0x30>;

      ngpios = <32>;

      gpio-controller;

      #gpio-cells = <2>;

      interrupt-controller;

      #interrupt-cells = <2>;

      interrupts = <16>, <17>, <18>, <19>;

    };



  - |

    gpio@18140 {

      compatible = "marvell,armada-370-gpio", "marvell,orion-gpio";

      reg = <0x18140 0x40>, <0x181c8 0x08>;

      reg-names = "gpio", "pwm";

      ngpios = <17>;

      gpio-controller;

      #gpio-cells = <2>;

      #pwm-cells = <2>;

      interrupt-controller;

      #interrupt-cells = <2>;

      interrupts = <87>, <88>, <89>;

      clocks = <&coreclk 0>;

    };

MAINTAINERS

+1 −1
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@@ -16330,7 +16330,7 @@ L: linux-pwm@vger.kernel.org 
S:	Maintained

Q:	https://patchwork.ozlabs.org/project/linux-pwm/list/

T:	git git://git.kernel.org/pub/scm/linux/kernel/git/thierry.reding/linux-pwm.git

F:	Documentation/devicetree/bindings/gpio/gpio-mvebu.txt

F:	Documentation/devicetree/bindings/gpio/gpio-mvebu.yaml

F:	Documentation/devicetree/bindings/pwm/

F:	Documentation/driver-api/pwm.rst

F:	drivers/gpio/gpio-mvebu.c