Commit 12b3d697 authored by Robert Richter's avatar Robert Richter Committed by Dave Jiang
Browse files

cxl: Remove core/acpi.c and cxl core dependency on ACPI 

From Dave [1]:

"""
It was a mistake to introduce core/acpi.c and putting ACPI dependency on
cxl_core when adding the extended linear cache support.
"""

Current implementation calls hmat_get_extended_linear_cache_size() of
the ACPI subsystem. That external reference causes issue running
cxl_test as there is no way to "mock" that function and ignore it when
using cxl test.

Instead of working around that using cxlrd ops and extensively
expanding cxl_test code [1], just move HMAT calls out of the core
module to cxl_acpi. Implement this by adding a @cache_size member to
struct cxl_root_decoder. During initialization the cache size is
determined and added to the root decoder object in cxl_acpi. Later on
in cxl_core the cache_size parameter is used to setup extended linear
caching.

[1] https://patch.msgid.link/20250610172938.139428-1-dave.jiang@intel.com



[ dj: Remove core/acpi.o from tools/testing/cxl/Kbuild ]
[ dj: Add kdoc for cxlrd->cache_size ]

Cc: Dave Jiang <dave.jiang@intel.com>
Signed-off-by: default avatarRobert Richter <rrichter@amd.com>
Reviewed-by: default avatarAlison Schofield <alison.schofield@intel.com>
Reviewed-by: default avatarJonathan Cameron <jonathan.cameron@huawei.com>
Reviewed-by: default avatarDave Jiang <dave.jiang@intel.com>
Link: https://patch.msgid.link/20250711151529.787470-1-rrichter@amd.com


Signed-off-by: default avatarDave Jiang <dave.jiang@intel.com>
parent bdf2d9fd

drivers/cxl/acpi.c

+59 −0
Original line number Diff line number Diff line
@@ -335,6 +335,63 @@ static int add_or_reset_cxl_resource(struct resource *parent, struct resource *r 
	return rc;

}



static int cxl_acpi_set_cache_size(struct cxl_root_decoder *cxlrd)

{

	struct cxl_decoder *cxld = &cxlrd->cxlsd.cxld;

	struct range *hpa = &cxld->hpa_range;

	resource_size_t size = range_len(hpa);

	resource_size_t start = hpa->start;

	resource_size_t cache_size;

	struct resource res;

	int nid, rc;



	res = DEFINE_RES(start, size, 0);

	nid = phys_to_target_node(start);



	rc = hmat_get_extended_linear_cache_size(&res, nid, &cache_size);

	if (rc)

		return rc;



	/*

	 * The cache range is expected to be within the CFMWS.

	 * Currently there is only support cache_size == cxl_size. CXL

	 * size is then half of the total CFMWS window size.

	 */

	size = size >> 1;

	if (cache_size && size != cache_size) {

		dev_warn(&cxld->dev,

			 "Extended Linear Cache size %pa != CXL size %pa. No Support!",

			 &cache_size, &size);

		return -ENXIO;

	}



	cxlrd->cache_size = cache_size;



	return 0;

}



static void cxl_setup_extended_linear_cache(struct cxl_root_decoder *cxlrd)

{

	int rc;



	rc = cxl_acpi_set_cache_size(cxlrd);

	if (!rc)

		return;



	if (rc != -EOPNOTSUPP) {

		/*

		 * Failing to support extended linear cache region resize does not

		 * prevent the region from functioning. Only causes cxl list showing

		 * incorrect region size.

		 */

		dev_warn(cxlrd->cxlsd.cxld.dev.parent,

			 "Extended linear cache calculation failed rc:%d\n", rc);

	}



	/* Ignoring return code */

	cxlrd->cache_size = 0;

}



DEFINE_FREE(put_cxlrd, struct cxl_root_decoder *,

	    if (!IS_ERR_OR_NULL(_T)) put_device(&_T->cxlsd.cxld.dev))

DEFINE_FREE(del_cxl_resource, struct resource *, if (_T) del_cxl_resource(_T))
@@ -394,6 +451,8 @@ static int __cxl_parse_cfmws(struct acpi_cedt_cfmws *cfmws, 
		ig = CXL_DECODER_MIN_GRANULARITY;

	cxld->interleave_granularity = ig;



	cxl_setup_extended_linear_cache(cxlrd);



	if (cfmws->interleave_arithmetic == ACPI_CEDT_CFMWS_ARITHMETIC_XOR) {

		if (ways != 1 && ways != 3) {

			cxims_ctx = (struct cxl_cxims_context) {

drivers/cxl/core/Makefile

+0 −1
Original line number Diff line number Diff line
@@ -15,7 +15,6 @@ cxl_core-y += hdm.o 
cxl_core-y += pmu.o

cxl_core-y += cdat.o

cxl_core-y += ras.o

cxl_core-y += acpi.o

cxl_core-$(CONFIG_TRACING) += trace.o

cxl_core-$(CONFIG_CXL_REGION) += region.o

cxl_core-$(CONFIG_CXL_MCE) += mce.o

drivers/cxl/core/acpi.c

deleted100644 → 0
+0 −11
Original line number Diff line number Diff line 
// SPDX-License-Identifier: GPL-2.0-only

/* Copyright(c) 2024 Intel Corporation. All rights reserved. */

#include <linux/acpi.h>

#include "cxl.h"

#include "core.h"



int cxl_acpi_get_extended_linear_cache_size(struct resource *backing_res,

					    int nid, resource_size_t *size)

{

	return hmat_get_extended_linear_cache_size(backing_res, nid, size);

}

drivers/cxl/core/core.h

+0 −2
Original line number Diff line number Diff line
@@ -121,8 +121,6 @@ int cxl_port_get_switch_dport_bandwidth(struct cxl_port *port, 
int cxl_ras_init(void);

void cxl_ras_exit(void);

int cxl_gpf_port_setup(struct cxl_dport *dport);

int cxl_acpi_get_extended_linear_cache_size(struct resource *backing_res,

					    int nid, resource_size_t *size);



#ifdef CONFIG_CXL_FEATURES

struct cxl_feat_entry *

drivers/cxl/core/region.c

+1 −6
Original line number Diff line number Diff line
@@ -3282,15 +3282,10 @@ static int cxl_extended_linear_cache_resize(struct cxl_region *cxlr, 
{

	struct cxl_root_decoder *cxlrd = to_cxl_root_decoder(cxlr->dev.parent);

	struct cxl_region_params *p = &cxlr->params;

	int nid = phys_to_target_node(res->start);

	resource_size_t size = resource_size(res);

	resource_size_t cache_size, start;

	int rc;



	rc = cxl_acpi_get_extended_linear_cache_size(res, nid, &cache_size);

	if (rc)

		return rc;



	cache_size = cxlrd->cache_size;

	if (!cache_size)

		return 0;