Commit 12e03c80 authored by Ville Syrjälä's avatar Ville Syrjälä
Browse files

drm/i915/psr: Unify PSR pre/post plane update hooks 



intel_psr_pre_plane_update() operates on a per-crtc level, whereas
intel_psr_post_plane_update() operates on the whole atomic commit,
for no real reason that I can see. Adjust intel_psr_post_plane_update()
to match the intel_psr_pre_plane_update() approach.

Signed-off-by: default avatarVille Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20231004155607.7719-2-ville.syrjala@linux.intel.com


Reviewed-by: default avatarJani Nikula <jani.nikula@intel.com>
parent 64909aa6

drivers/gpu/drm/i915/display/intel_display.c

+2 −1
Original line number Diff line number Diff line
@@ -956,6 +956,8 @@ static void intel_post_plane_update(struct intel_atomic_state *state, 
		intel_atomic_get_new_crtc_state(state, crtc);

	enum pipe pipe = crtc->pipe;



	intel_psr_post_plane_update(state, crtc);



	intel_frontbuffer_flip(dev_priv, new_crtc_state->fb_bits);



	if (new_crtc_state->update_wm_post && new_crtc_state->hw.active)
@@ -7296,7 +7298,6 @@ static void intel_atomic_commit_tail(struct intel_atomic_state *state) 
	}



	intel_dbuf_post_plane_update(state);

	intel_psr_post_plane_update(state);



	for_each_oldnew_intel_crtc_in_state(state, crtc, old_crtc_state, new_crtc_state, i) {

		intel_post_plane_update(state, crtc);

drivers/gpu/drm/i915/display/intel_psr.c

+4 −16
Original line number Diff line number Diff line
@@ -2195,10 +2195,12 @@ void intel_psr_pre_plane_update(struct intel_atomic_state *state, 
	}

}



static void _intel_psr_post_plane_update(const struct intel_atomic_state *state,

					 const struct intel_crtc_state *crtc_state)

void intel_psr_post_plane_update(struct intel_atomic_state *state,

				 struct intel_crtc *crtc)

{

	struct drm_i915_private *dev_priv = to_i915(state->base.dev);

	const struct intel_crtc_state *crtc_state =

		intel_atomic_get_new_crtc_state(state, crtc);

	struct intel_encoder *encoder;



	if (!crtc_state->has_psr)
@@ -2241,20 +2243,6 @@ static void _intel_psr_post_plane_update(const struct intel_atomic_state *state, 
	}

}



void intel_psr_post_plane_update(const struct intel_atomic_state *state)

{

	struct drm_i915_private *dev_priv = to_i915(state->base.dev);

	struct intel_crtc_state *crtc_state;

	struct intel_crtc *crtc;

	int i;



	if (!HAS_PSR(dev_priv))

		return;



	for_each_new_intel_crtc_in_state(state, crtc, crtc_state, i)

		_intel_psr_post_plane_update(state, crtc_state);

}



static int _psr2_ready_for_pipe_update_locked(struct intel_dp *intel_dp)

{

	struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);

drivers/gpu/drm/i915/display/intel_psr.h

+2 −1
Original line number Diff line number Diff line
@@ -24,7 +24,8 @@ struct intel_plane_state; 
void intel_psr_init_dpcd(struct intel_dp *intel_dp);

void intel_psr_pre_plane_update(struct intel_atomic_state *state,

				struct intel_crtc *crtc);

void intel_psr_post_plane_update(const struct intel_atomic_state *state);

void intel_psr_post_plane_update(struct intel_atomic_state *state,

				 struct intel_crtc *crtc);

void intel_psr_disable(struct intel_dp *intel_dp,

		       const struct intel_crtc_state *old_crtc_state);

int intel_psr_debug_set(struct intel_dp *intel_dp, u64 value);