Unverified Commit 135c6af1 authored by Mario Limonciello's avatar Mario Limonciello Committed by Mark Brown
Browse files

ASoC: amd: acp: acp70: Use AMD_NODE 



All consumers of SMN in the kernel should be doing it through the
functions provided by AMD_NODE.

Stop using the local SMN read/write symbols and switch to the AMD_NODE
provided ones.

Tested by: Venkata Prasad Potturu <venkataprasad.potturu@amd.com>

Signed-off-by: default avatarMario Limonciello <mario.limonciello@amd.com>
Link: https://patch.msgid.link/20250217231747.1656228-4-superm1@kernel.org


Signed-off-by: default avatarMark Brown <broonie@kernel.org>
parent e211adcf

sound/soc/amd/acp/Kconfig

+1 −0
Original line number Diff line number Diff line
@@ -82,6 +82,7 @@ config SND_AMD_ASOC_ACP70 
	tristate "AMD ACP ASOC Acp7.0 Support"

	depends on X86 && PCI

	depends on ACPI

	depends on AMD_NODE

	select SND_SOC_AMD_ACP_PCM

	select SND_SOC_AMD_ACP_I2S

	select SND_SOC_AMD_ACP_PDM

sound/soc/amd/acp/acp70.c

+4 −24
Original line number Diff line number Diff line
@@ -23,6 +23,8 @@ 
#include "amd.h"

#include "acp-mach.h"



#include <asm/amd_node.h>



#define DRV_NAME "acp_asoc_acp70"



#define CLK7_CLK0_DFS_CNTL_N1		0X0006C1A4
@@ -137,29 +139,6 @@ static struct snd_soc_dai_driver acp70_dai[] = { 
},

};



static int acp70_i2s_master_clock_generate(struct acp_dev_data *adata)

{

	struct pci_dev *smn_dev;

	u32 device_id;



	if (adata->acp_rev == ACP70_PCI_ID)

		device_id = 0x1507;

	else if (adata->acp_rev == ACP71_PCI_ID)

		device_id = 0x1122;

	else

		return -ENODEV;



	smn_dev = pci_get_device(PCI_VENDOR_ID_AMD, device_id, NULL);



	if (!smn_dev)

		return -ENODEV;



	/* Set clk7 DFS clock divider register value to get mclk as 196.608MHz*/

	smn_write(smn_dev, CLK7_CLK0_DFS_CNTL_N1, CLK0_DIVIDER);



	return 0;

}



static int acp_acp70_audio_probe(struct platform_device *pdev)

{

	struct device *dev = &pdev->dev;
@@ -215,7 +194,8 @@ static int acp_acp70_audio_probe(struct platform_device *pdev) 


	dev_set_drvdata(dev, adata);



	ret = acp70_i2s_master_clock_generate(adata);

	/* Set clk7 DFS clock divider register value to get mclk as 196.608MHz*/

	ret = amd_smn_write(0, CLK7_CLK0_DFS_CNTL_N1, CLK0_DIVIDER);

	if (ret) {

		dev_err(&pdev->dev, "Failed to set I2S master clock as 196.608MHz\n");

		return ret;

sound/soc/sof/amd/pci-acp70.c

+0 −1
Original line number Diff line number Diff line
@@ -28,7 +28,6 @@ 
#define ACP70_REG_END			0x125C000



static const struct sof_amd_acp_desc acp70_chip_info = {

	.host_bridge_id = HOST_BRIDGE_ACP70,

	.pgfsm_base	= ACP70_PGFSM_BASE,

	.ext_intr_enb = ACP70_EXTERNAL_INTR_ENB,

	.ext_intr_cntl = ACP70_EXTERNAL_INTR_CNTL,