dt-bindings: pinctrl: Add thead,th1520-pinctrl bindings

# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)

%YAML 1.2

---

$id: http://devicetree.org/schemas/pinctrl/thead,th1520-pinctrl.yaml#

$schema: http://devicetree.org/meta-schemas/core.yaml#

title: T-Head TH1520 SoC pin controller

maintainers:

  - Emil Renner Berthing <emil.renner.berthing@canonical.com>

description: |

  Pinmux and pinconf controller in the T-Head TH1520 RISC-V SoC.

  The TH1520 has 3 groups of pads each controlled from different memory ranges.

  Confusingly the memory ranges are named

    PADCTRL_AOSYS  -> PAD Group 1

    PADCTRL1_APSYS -> PAD Group 2

    PADCTRL0_APSYS -> PAD Group 3

  Each pad can be muxed individually to up to 6 different functions. For most

  pads only a few of those 6 configurations are valid though, and a few pads in

  group 1 does not support muxing at all.

  Pinconf is fairly regular except for a few pads in group 1 that either can't

  be configured or has some special functions. The rest have configurable drive

  strength, input enable, schmitt trigger, slew rate, pull-up and pull-down in

  addition to a special strong pull up.

  Certain pads in group 1 can be muxed to AUDIO_PA0 - AUDIO_PA30 functions and

  are then meant to be used by the audio co-processor. Each such pad can then

  be further muxed to either audio GPIO or one of 4 functions such as UART, I2C

  and I2S. If the audio pad is muxed to one of the 4 functions then pinconf is

  also configured in different registers. All of this is done from a different

  AUDIO_IOCTRL memory range and is left to the audio co-processor for now.

properties:

  compatible:

    enum:

      - thead,th1520-pinctrl

  reg:

    maxItems: 1

  clocks:

    maxItems: 1

  thead,pad-group:

    description: |

      Select the pad group that is associated with the pin controller instance.

        Base Address   Name           Group

        0xFF_FFF4_A000 PADCTRL_AOSYS  1

        0xFF_E7F3_C000 PADCTRL1_APSYS 2

        0xFF_EC00_7000 PADCTRL0_APSYS 3

    $ref: /schemas/types.yaml#/definitions/uint32

    enum: [1, 2, 3]

required:

  - compatible

  - reg

  - clocks

patternProperties:

  '-[0-9]+$':

    type: object

    additionalProperties: false

    patternProperties:

      '-pins$':

        type: object

        allOf:

          - $ref: /schemas/pinctrl/pincfg-node.yaml#

          - $ref: /schemas/pinctrl/pinmux-node.yaml#

        additionalProperties: false

        description:

          A pinctrl node should contain at least one subnode describing one

          or more pads and their associated pinmux and pinconf settings.

        properties:

          pins:

            description: List of pads that properties in the node apply to.

          function:

            enum: [ gpio, pwm, uart, ir, i2c, spi, qspi, sdio, audio, i2s,

                    gmac0, gmac1, dpu0, dpu1, isp, hdmi, bootsel, debug,

                    clock, jtag, iso7816, efuse, reset ]

            description: The mux function to select for the given pins.

          bias-disable: true

          bias-pull-up:

            oneOf:

              - type: boolean

                description: Enable the regular 48kOhm pull-up

              - enum: [ 2100, 48000 ]

                description: Enable the strong 2.1kOhm pull-up or regular 48kOhm pull-up

          bias-pull-down:

            oneOf:

              - type: boolean

              - const: 44000

            description: Enable the regular 44kOhm pull-down

          drive-strength:

            enum: [ 1, 2, 3, 5, 7, 8, 10, 12, 13, 15, 16, 18, 20, 21, 23, 25 ]

            description: Drive strength in mA

          input-enable: true

          input-disable: true

          input-schmitt-enable: true

          input-schmitt-disable: true

          slew-rate:

            maximum: 1

        required:

          - pins

additionalProperties: false

examples:

  - |

    padctrl0_apsys: pinctrl@ec007000 {

        compatible = "thead,th1520-pinctrl";

        reg = <0xec007000 0x1000>;

        clocks = <&apb_clk>;

        thead,pad-group = <3>;

        uart0_pins: uart0-0 {

            tx-pins {

                pins = "UART0_TXD";

                function = "uart";

                bias-disable;

                drive-strength = <3>;

                input-disable;

                input-schmitt-disable;

                slew-rate = <0>;

            };

            rx-pins {

                pins = "UART0_RXD";

                function = "uart";

                bias-disable;

                drive-strength = <1>;

                input-enable;

                input-schmitt-enable;

                slew-rate = <0>;

            };

        };

    };

    padctrl1_apsys: pinctrl@e7f3c000 {

        compatible = "thead,th1520-pinctrl";

        reg = <0xe7f3c000 0x1000>;

        clocks = <&apb_clk>;

        thead,pad-group = <2>;

        i2c5_pins: i2c5-0 {

            i2c-pins {

                pins = "QSPI1_CSN0",    /* I2C5_SCL */

                       "QSPI1_D0_MOSI"; /* I2C5_SDA */

                function = "i2c";

                bias-pull-up = <2100>;

                drive-strength = <7>;

                input-enable;

                input-schmitt-enable;

                slew-rate = <0>;

            };

        };

    };

S:	Maintained

T:	git https://github.com/pdp7/linux.git

F:	Documentation/devicetree/bindings/clock/thead,th1520-clk-ap.yaml

F:	Documentation/devicetree/bindings/pinctrl/thead,th1520-pinctrl.yaml

F:	arch/riscv/boot/dts/thead/

F:	drivers/clk/thead/clk-th1520-ap.c

F:	include/dt-bindings/clock/thead,th1520-clk-ap.h