Commit 142cd602 authored by Ben Skeggs's avatar Ben Skeggs Committed by Dave Airlie
Browse files

drm/nouveau/nvdec/r535: initial support 



Adds support for allocating VIDEO_DECODER classes from RM.

Signed-off-by: default avatarBen Skeggs <bskeggs@redhat.com>
Signed-off-by: default avatarDave Airlie <airlied@redhat.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20230918202149.4343-42-skeggsb@gmail.com
parent 361c3cd8

drivers/gpu/drm/nouveau/include/nvif/class.h

+5 −0
Original line number Diff line number Diff line
@@ -198,6 +198,11 @@ 


#define NV74_BSP                                                     0x000074b0



#define NVC4B0_VIDEO_DECODER                                         0x0000c4b0

#define NVC6B0_VIDEO_DECODER                                         0x0000c6b0

#define NVC7B0_VIDEO_DECODER                                         0x0000c7b0

#define NVC9B0_VIDEO_DECODER                                         0x0000c9b0



#define GT212_MSVLD                                                  0x000085b1

#define IGT21A_MSVLD                                                 0x000086b1

#define G98_MSVLD                                                    0x000088b1

drivers/gpu/drm/nouveau/include/nvkm/engine/nvdec.h

+2 −0
Original line number Diff line number Diff line
@@ -13,5 +13,7 @@ struct nvkm_nvdec { 


int gm107_nvdec_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_nvdec **);

int tu102_nvdec_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_nvdec **);

int ga100_nvdec_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_nvdec **);

int ga102_nvdec_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_nvdec **);

int ad102_nvdec_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_nvdec **);

#endif

drivers/gpu/drm/nouveau/include/nvrm/535.54.03/common/sdk/nvidia/inc/ctrl/ctrl2080/ctrl2080internal.h

+16 −0
Original line number Diff line number Diff line
@@ -57,6 +57,22 @@ typedef struct NV2080_CTRL_INTERNAL_STATIC_GR_GET_CONTEXT_BUFFERS_INFO_PARAMS { 


#define NV2080_CTRL_CMD_INTERNAL_STATIC_KGR_GET_CONTEXT_BUFFERS_INFO (0x20800a32) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_0_INTERNAL_INTERFACE_ID << 8) | NV2080_CTRL_INTERNAL_STATIC_KGR_GET_CONTEXT_BUFFERS_INFO_PARAMS_MESSAGE_ID" */



typedef struct NV2080_CTRL_INTERNAL_CONSTRUCTED_FALCON_INFO {

    NvU32 engDesc;

    NvU32 ctxAttr;

    NvU32 ctxBufferSize;

    NvU32 addrSpaceList;

    NvU32 registerBase;

} NV2080_CTRL_INTERNAL_CONSTRUCTED_FALCON_INFO;

#define NV2080_CTRL_CMD_INTERNAL_MAX_CONSTRUCTED_FALCONS     0x40



#define NV2080_CTRL_CMD_INTERNAL_GET_CONSTRUCTED_FALCON_INFO (0x20800a42) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_0_INTERNAL_INTERFACE_ID << 8) | NV2080_CTRL_INTERNAL_GET_CONSTRUCTED_FALCON_INFO_PARAMS_MESSAGE_ID" */



typedef struct NV2080_CTRL_INTERNAL_GET_CONSTRUCTED_FALCON_INFO_PARAMS {

    NvU32                                        numConstructedFalcons;

    NV2080_CTRL_INTERNAL_CONSTRUCTED_FALCON_INFO constructedFalconsTable[NV2080_CTRL_CMD_INTERNAL_MAX_CONSTRUCTED_FALCONS];

} NV2080_CTRL_INTERNAL_GET_CONSTRUCTED_FALCON_INFO_PARAMS;



#define NV2080_CTRL_CMD_INTERNAL_DISPLAY_WRITE_INST_MEM (0x20800a49) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_0_INTERNAL_INTERFACE_ID << 8) | NV2080_CTRL_INTERNAL_DISPLAY_WRITE_INST_MEM_PARAMS_MESSAGE_ID" */



typedef struct NV2080_CTRL_INTERNAL_DISPLAY_WRITE_INST_MEM_PARAMS {

drivers/gpu/drm/nouveau/include/nvrm/535.54.03/common/sdk/nvidia/inc/nvos.h

+7 −0
Original line number Diff line number Diff line
@@ -105,6 +105,13 @@ typedef struct 
    NvP64    pControl NV_ALIGN_BYTES(8); // pControl gives virt addr of control region for PIO channel

} NV50VAIO_CHANNELPIO_ALLOCATION_PARAMETERS;



typedef struct

{

    NvU32 size;

    NvU32 prohibitMultipleInstances;

    NvU32 engineInstance;               // Select NVDEC0 or NVDEC1 or NVDEC2

} NV_BSP_ALLOCATION_PARAMETERS;



typedef struct

{

    NvU32   index;

drivers/gpu/drm/nouveau/include/nvrm/535.54.03/nvidia/inc/kernel/gpu/intr/engine_idx.h

+6 −0
Original line number Diff line number Diff line
@@ -34,6 +34,12 @@ 


#define MC_ENGINE_IDX_GSP                           49



#define MC_ENGINE_IDX_BSP                           64

#define MC_ENGINE_IDX_NVDEC                         MC_ENGINE_IDX_BSP

#define MC_ENGINE_IDX_NVDEC0                        MC_ENGINE_IDX_NVDEC



#define MC_ENGINE_IDX_NVDEC7                        71



#define MC_ENGINE_IDX_GR                            82

#define MC_ENGINE_IDX_GR0                           MC_ENGINE_IDX_GR