Commit 148bbe29 authored by Elaine Zhang's avatar Elaine Zhang Committed by Heiko Stuebner
Browse files

arm64: dts: rockchip: Fix power-controller node names for rk3399 



Use more generic names (as recommended in the device tree specification
or the binding documentation)

Signed-off-by: default avatarElaine Zhang <zhangqing@rock-chips.com>
Reviewed-by: default avatarEnric Balletbo i Serra <enric.balletbo@collabora.com>
Signed-off-by: default avatarJohan Jonker <jbx6244@gmail.com>
Link: https://lore.kernel.org/r/20210417112952.8516-8-jbx6244@gmail.com


Signed-off-by: default avatarHeiko Stuebner <heiko@sntech.de>
parent 6e6a282b

arch/arm64/boot/dts/rockchip/rk3399.dtsi

+20 −20
Original line number Diff line number Diff line
@@ -968,26 +968,26 @@ power: power-controller { 
			#size-cells = <0>;



			/* These power domains are grouped by VD_CENTER */

			pd_iep@RK3399_PD_IEP {

			power-domain@RK3399_PD_IEP {

				reg = <RK3399_PD_IEP>;

				clocks = <&cru ACLK_IEP>,

					 <&cru HCLK_IEP>;

				pm_qos = <&qos_iep>;

			};

			pd_rga@RK3399_PD_RGA {

			power-domain@RK3399_PD_RGA {

				reg = <RK3399_PD_RGA>;

				clocks = <&cru ACLK_RGA>,

					 <&cru HCLK_RGA>;

				pm_qos = <&qos_rga_r>,

					 <&qos_rga_w>;

			};

			pd_vcodec@RK3399_PD_VCODEC {

			power-domain@RK3399_PD_VCODEC {

				reg = <RK3399_PD_VCODEC>;

				clocks = <&cru ACLK_VCODEC>,

					 <&cru HCLK_VCODEC>;

				pm_qos = <&qos_video_m0>;

			};

			pd_vdu@RK3399_PD_VDU {

			power-domain@RK3399_PD_VDU {

				reg = <RK3399_PD_VDU>;

				clocks = <&cru ACLK_VDU>,

					 <&cru HCLK_VDU>;
@@ -996,94 +996,94 @@ pd_vdu@RK3399_PD_VDU { 
			};



			/* These power domains are grouped by VD_GPU */

			pd_gpu@RK3399_PD_GPU {

			power-domain@RK3399_PD_GPU {

				reg = <RK3399_PD_GPU>;

				clocks = <&cru ACLK_GPU>;

				pm_qos = <&qos_gpu>;

			};



			/* These power domains are grouped by VD_LOGIC */

			pd_edp@RK3399_PD_EDP {

			power-domain@RK3399_PD_EDP {

				reg = <RK3399_PD_EDP>;

				clocks = <&cru PCLK_EDP_CTRL>;

			};

			pd_emmc@RK3399_PD_EMMC {

			power-domain@RK3399_PD_EMMC {

				reg = <RK3399_PD_EMMC>;

				clocks = <&cru ACLK_EMMC>;

				pm_qos = <&qos_emmc>;

			};

			pd_gmac@RK3399_PD_GMAC {

			power-domain@RK3399_PD_GMAC {

				reg = <RK3399_PD_GMAC>;

				clocks = <&cru ACLK_GMAC>,

					 <&cru PCLK_GMAC>;

				pm_qos = <&qos_gmac>;

			};

			pd_sd@RK3399_PD_SD {

			power-domain@RK3399_PD_SD {

				reg = <RK3399_PD_SD>;

				clocks = <&cru HCLK_SDMMC>,

					 <&cru SCLK_SDMMC>;

				pm_qos = <&qos_sd>;

			};

			pd_sdioaudio@RK3399_PD_SDIOAUDIO {

			power-domain@RK3399_PD_SDIOAUDIO {

				reg = <RK3399_PD_SDIOAUDIO>;

				clocks = <&cru HCLK_SDIO>;

				pm_qos = <&qos_sdioaudio>;

			};

			pd_tcpc0@RK3399_PD_TCPD0 {

			power-domain@RK3399_PD_TCPD0 {

				reg = <RK3399_PD_TCPD0>;

				clocks = <&cru SCLK_UPHY0_TCPDCORE>,

					 <&cru SCLK_UPHY0_TCPDPHY_REF>;

			};

			pd_tcpc1@RK3399_PD_TCPD1 {

			power-domain@RK3399_PD_TCPD1 {

				reg = <RK3399_PD_TCPD1>;

				clocks = <&cru SCLK_UPHY1_TCPDCORE>,

					 <&cru SCLK_UPHY1_TCPDPHY_REF>;

			};

			pd_usb3@RK3399_PD_USB3 {

			power-domain@RK3399_PD_USB3 {

				reg = <RK3399_PD_USB3>;

				clocks = <&cru ACLK_USB3>;

				pm_qos = <&qos_usb_otg0>,

					 <&qos_usb_otg1>;

			};

			pd_vio@RK3399_PD_VIO {

			power-domain@RK3399_PD_VIO {

				reg = <RK3399_PD_VIO>;

				#address-cells = <1>;

				#size-cells = <0>;



				pd_hdcp@RK3399_PD_HDCP {

				power-domain@RK3399_PD_HDCP {

					reg = <RK3399_PD_HDCP>;

					clocks = <&cru ACLK_HDCP>,

						 <&cru HCLK_HDCP>,

						 <&cru PCLK_HDCP>;

					pm_qos = <&qos_hdcp>;

				};

				pd_isp0@RK3399_PD_ISP0 {

				power-domain@RK3399_PD_ISP0 {

					reg = <RK3399_PD_ISP0>;

					clocks = <&cru ACLK_ISP0>,

						 <&cru HCLK_ISP0>;

					pm_qos = <&qos_isp0_m0>,

						 <&qos_isp0_m1>;

				};

				pd_isp1@RK3399_PD_ISP1 {

				power-domain@RK3399_PD_ISP1 {

					reg = <RK3399_PD_ISP1>;

					clocks = <&cru ACLK_ISP1>,

						 <&cru HCLK_ISP1>;

					pm_qos = <&qos_isp1_m0>,

						 <&qos_isp1_m1>;

				};

				pd_vo@RK3399_PD_VO {

				power-domain@RK3399_PD_VO {

					reg = <RK3399_PD_VO>;

					#address-cells = <1>;

					#size-cells = <0>;



					pd_vopb@RK3399_PD_VOPB {

					power-domain@RK3399_PD_VOPB {

						reg = <RK3399_PD_VOPB>;

						clocks = <&cru ACLK_VOP0>,

							 <&cru HCLK_VOP0>;

						pm_qos = <&qos_vop_big_r>,

							 <&qos_vop_big_w>;

					};

					pd_vopl@RK3399_PD_VOPL {

					power-domain@RK3399_PD_VOPL {

						reg = <RK3399_PD_VOPL>;

						clocks = <&cru ACLK_VOP1>,

							 <&cru HCLK_VOP1>;