Commit 14bc1a59 authored by Ian Rogers's avatar Ian Rogers Committed by Namhyung Kim
Browse files

perf vendor events intel: Update ivytown TMA metrics to 4.7 

Top-Down Microarchitecture Analysis (TMA) metrics simplify
cycle-accounting using microarchitecture-abstracted metrics
organized in one hierarchy. This update is from version 4.5 to
4.7.

The update includes:

 - Swapped tma_info_core_ilp (becomes per SMT thread) and
   tma_info_pipeline_execute (per physical core).
 - Reduced number of events when SMT is off.
 - Tuned thresholds for tma_fetch_bandwidth and
   tma_ports_utilized_3m.

The update came from:

https://github.com/intel/perfmon/pull/140
https://github.com/intel/perfmon/pull/138

Running the script:

https://github.com/intel/perfmon/blob/main/scripts/create_perf_json.py



Signed-off-by: default avatarIan Rogers <irogers@google.com>
Reviewed-by: default avatarKan Liang <kan.liang@linux.intel.com>
Cc: Stephane Eranian <eranian@google.com>
Cc: Caleb Biggers <caleb.biggers@intel.com>
Cc: Edward Baker <edward.baker@intel.com>
Cc: Perry Taylor <perry.taylor@intel.com>
Cc: Samantha Alt <samantha.alt@intel.com>
Cc: Weilin Wang <weilin.wang@intel.com>
Signed-off-by: default avatarNamhyung Kim <namhyung@kernel.org>
Link: https://lore.kernel.org/r/20240214011820.644458-24-irogers@google.com
parent 8cf54fa8

tools/perf/pmu-events/arch/x86/ivytown/ivt-metrics.json

+111 −89

File changed.

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tools/perf/pmu-events/arch/x86/ivytown/metricgroups.json

+5 −2
Original line number Diff line number Diff line
@@ -2,10 +2,10 @@ 
    "Backend": "Grouping from Top-down Microarchitecture Analysis Metrics spreadsheet",

    "Bad": "Grouping from Top-down Microarchitecture Analysis Metrics spreadsheet",

    "BadSpec": "Grouping from Top-down Microarchitecture Analysis Metrics spreadsheet",

    "BigFoot": "Grouping from Top-down Microarchitecture Analysis Metrics spreadsheet",

    "BigFootprint": "Grouping from Top-down Microarchitecture Analysis Metrics spreadsheet",

    "BrMispredicts": "Grouping from Top-down Microarchitecture Analysis Metrics spreadsheet",

    "Branches": "Grouping from Top-down Microarchitecture Analysis Metrics spreadsheet",

    "CacheMisses": "Grouping from Top-down Microarchitecture Analysis Metrics spreadsheet",

    "CacheHits": "Grouping from Top-down Microarchitecture Analysis Metrics spreadsheet",

    "Compute": "Grouping from Top-down Microarchitecture Analysis Metrics spreadsheet",

    "Cor": "Grouping from Top-down Microarchitecture Analysis Metrics spreadsheet",

    "DSB": "Grouping from Top-down Microarchitecture Analysis Metrics spreadsheet",
@@ -24,7 +24,9 @@ 
    "L2Evicts": "Grouping from Top-down Microarchitecture Analysis Metrics spreadsheet",

    "LSD": "Grouping from Top-down Microarchitecture Analysis Metrics spreadsheet",

    "MachineClears": "Grouping from Top-down Microarchitecture Analysis Metrics spreadsheet",

    "Machine_Clears": "Grouping from Top-down Microarchitecture Analysis Metrics spreadsheet",

    "Mem": "Grouping from Top-down Microarchitecture Analysis Metrics spreadsheet",

    "MemOffcore": "Grouping from Top-down Microarchitecture Analysis Metrics spreadsheet",

    "MemoryBW": "Grouping from Top-down Microarchitecture Analysis Metrics spreadsheet",

    "MemoryBound": "Grouping from Top-down Microarchitecture Analysis Metrics spreadsheet",

    "MemoryLat": "Grouping from Top-down Microarchitecture Analysis Metrics spreadsheet",
@@ -94,6 +96,7 @@ 
    "tma_l3_bound_group": "Metrics contributing to tma_l3_bound category",

    "tma_light_operations_group": "Metrics contributing to tma_light_operations category",

    "tma_load_op_utilization_group": "Metrics contributing to tma_load_op_utilization category",

    "tma_machine_clears_group": "Metrics contributing to tma_machine_clears category",

    "tma_mem_latency_group": "Metrics contributing to tma_mem_latency category",

    "tma_memory_bound_group": "Metrics contributing to tma_memory_bound category",

    "tma_microcode_sequencer_group": "Metrics contributing to tma_microcode_sequencer category",