Commit 14d70de5 authored by Anup Patel's avatar Anup Patel Committed by Anup Patel
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KVM: riscv: selftests: Add scaler crypto extensions to get-reg-list test 



The KVM RISC-V allows scaler crypto extensions for Guest/VM so let us
add these extensions to get-reg-list test. This includes extensions
Zbkb, Zbkc, Zbkx, Zknd, Zkne, Zknh, Zkr, Zksed, Zksh, and Zkt.

Signed-off-by: default avatarAnup Patel <apatel@ventanamicro.com>
Reviewed-by: default avatarAndrew Jones <ajones@ventanamicro.com>
Signed-off-by: default avatarAnup Patel <anup@brainfault.org>
parent f370b4e6

tools/testing/selftests/kvm/riscv/get-reg-list.c

+40 −0
Original line number Diff line number Diff line
@@ -50,6 +50,9 @@ bool filter_reg(__u64 reg) 
	case KVM_REG_RISCV_ISA_EXT | KVM_REG_RISCV_ISA_SINGLE | KVM_RISCV_ISA_EXT_ZBA:

	case KVM_REG_RISCV_ISA_EXT | KVM_REG_RISCV_ISA_SINGLE | KVM_RISCV_ISA_EXT_ZBB:

	case KVM_REG_RISCV_ISA_EXT | KVM_REG_RISCV_ISA_SINGLE | KVM_RISCV_ISA_EXT_ZBC:

	case KVM_REG_RISCV_ISA_EXT | KVM_REG_RISCV_ISA_SINGLE | KVM_RISCV_ISA_EXT_ZBKB:

	case KVM_REG_RISCV_ISA_EXT | KVM_REG_RISCV_ISA_SINGLE | KVM_RISCV_ISA_EXT_ZBKC:

	case KVM_REG_RISCV_ISA_EXT | KVM_REG_RISCV_ISA_SINGLE | KVM_RISCV_ISA_EXT_ZBKX:

	case KVM_REG_RISCV_ISA_EXT | KVM_REG_RISCV_ISA_SINGLE | KVM_RISCV_ISA_EXT_ZBS:

	case KVM_REG_RISCV_ISA_EXT | KVM_REG_RISCV_ISA_SINGLE | KVM_RISCV_ISA_EXT_ZICBOM:

	case KVM_REG_RISCV_ISA_EXT | KVM_REG_RISCV_ISA_SINGLE | KVM_RISCV_ISA_EXT_ZICBOZ:
@@ -59,6 +62,13 @@ bool filter_reg(__u64 reg) 
	case KVM_REG_RISCV_ISA_EXT | KVM_REG_RISCV_ISA_SINGLE | KVM_RISCV_ISA_EXT_ZIFENCEI:

	case KVM_REG_RISCV_ISA_EXT | KVM_REG_RISCV_ISA_SINGLE | KVM_RISCV_ISA_EXT_ZIHINTPAUSE:

	case KVM_REG_RISCV_ISA_EXT | KVM_REG_RISCV_ISA_SINGLE | KVM_RISCV_ISA_EXT_ZIHPM:

	case KVM_REG_RISCV_ISA_EXT | KVM_REG_RISCV_ISA_SINGLE | KVM_RISCV_ISA_EXT_ZKND:

	case KVM_REG_RISCV_ISA_EXT | KVM_REG_RISCV_ISA_SINGLE | KVM_RISCV_ISA_EXT_ZKNE:

	case KVM_REG_RISCV_ISA_EXT | KVM_REG_RISCV_ISA_SINGLE | KVM_RISCV_ISA_EXT_ZKNH:

	case KVM_REG_RISCV_ISA_EXT | KVM_REG_RISCV_ISA_SINGLE | KVM_RISCV_ISA_EXT_ZKR:

	case KVM_REG_RISCV_ISA_EXT | KVM_REG_RISCV_ISA_SINGLE | KVM_RISCV_ISA_EXT_ZKSED:

	case KVM_REG_RISCV_ISA_EXT | KVM_REG_RISCV_ISA_SINGLE | KVM_RISCV_ISA_EXT_ZKSH:

	case KVM_REG_RISCV_ISA_EXT | KVM_REG_RISCV_ISA_SINGLE | KVM_RISCV_ISA_EXT_ZKT:

	/*

	 * Like ISA_EXT registers, SBI_EXT registers are only visible when the

	 * host supports them and disabling them does not affect the visibility
@@ -396,6 +406,9 @@ static const char *isa_ext_single_id_to_str(__u64 reg_off) 
		KVM_ISA_EXT_ARR(ZBA),

		KVM_ISA_EXT_ARR(ZBB),

		KVM_ISA_EXT_ARR(ZBC),

		KVM_ISA_EXT_ARR(ZBKB),

		KVM_ISA_EXT_ARR(ZBKC),

		KVM_ISA_EXT_ARR(ZBKX),

		KVM_ISA_EXT_ARR(ZBS),

		KVM_ISA_EXT_ARR(ZICBOM),

		KVM_ISA_EXT_ARR(ZICBOZ),
@@ -405,6 +418,13 @@ static const char *isa_ext_single_id_to_str(__u64 reg_off) 
		KVM_ISA_EXT_ARR(ZIFENCEI),

		KVM_ISA_EXT_ARR(ZIHINTPAUSE),

		KVM_ISA_EXT_ARR(ZIHPM),

		KVM_ISA_EXT_ARR(ZKND),

		KVM_ISA_EXT_ARR(ZKNE),

		KVM_ISA_EXT_ARR(ZKNH),

		KVM_ISA_EXT_ARR(ZKR),

		KVM_ISA_EXT_ARR(ZKSED),

		KVM_ISA_EXT_ARR(ZKSH),

		KVM_ISA_EXT_ARR(ZKT),

	};



	if (reg_off >= ARRAY_SIZE(kvm_isa_ext_reg_name))
@@ -891,6 +911,9 @@ KVM_ISA_EXT_SIMPLE_CONFIG(svpbmt, SVPBMT); 
KVM_ISA_EXT_SIMPLE_CONFIG(zba, ZBA);

KVM_ISA_EXT_SIMPLE_CONFIG(zbb, ZBB);

KVM_ISA_EXT_SIMPLE_CONFIG(zbc, ZBC);

KVM_ISA_EXT_SIMPLE_CONFIG(zbkb, ZBKB);

KVM_ISA_EXT_SIMPLE_CONFIG(zbkc, ZBKC);

KVM_ISA_EXT_SIMPLE_CONFIG(zbkx, ZBKX);

KVM_ISA_EXT_SIMPLE_CONFIG(zbs, ZBS);

KVM_ISA_EXT_SUBLIST_CONFIG(zicbom, ZICBOM);

KVM_ISA_EXT_SUBLIST_CONFIG(zicboz, ZICBOZ);
@@ -900,6 +923,13 @@ KVM_ISA_EXT_SIMPLE_CONFIG(zicsr, ZICSR); 
KVM_ISA_EXT_SIMPLE_CONFIG(zifencei, ZIFENCEI);

KVM_ISA_EXT_SIMPLE_CONFIG(zihintpause, ZIHINTPAUSE);

KVM_ISA_EXT_SIMPLE_CONFIG(zihpm, ZIHPM);

KVM_ISA_EXT_SIMPLE_CONFIG(zknd, ZKND);

KVM_ISA_EXT_SIMPLE_CONFIG(zkne, ZKNE);

KVM_ISA_EXT_SIMPLE_CONFIG(zknh, ZKNH);

KVM_ISA_EXT_SIMPLE_CONFIG(zkr, ZKR);

KVM_ISA_EXT_SIMPLE_CONFIG(zksed, ZKSED);

KVM_ISA_EXT_SIMPLE_CONFIG(zksh, ZKSH);

KVM_ISA_EXT_SIMPLE_CONFIG(zkt, ZKT);



struct vcpu_reg_list *vcpu_configs[] = {

	&config_sbi_base,
@@ -918,6 +948,9 @@ struct vcpu_reg_list *vcpu_configs[] = { 
	&config_zba,

	&config_zbb,

	&config_zbc,

	&config_zbkb,

	&config_zbkc,

	&config_zbkx,

	&config_zbs,

	&config_zicbom,

	&config_zicboz,
@@ -927,5 +960,12 @@ struct vcpu_reg_list *vcpu_configs[] = { 
	&config_zifencei,

	&config_zihintpause,

	&config_zihpm,

	&config_zknd,

	&config_zkne,

	&config_zknh,

	&config_zkr,

	&config_zksed,

	&config_zksh,

	&config_zkt,

};

int vcpu_configs_n = ARRAY_SIZE(vcpu_configs);