Commit 14f293e0 authored by Alex Hung's avatar Alex Hung Committed by Alex Deucher
Browse files

drm/amd/display: Remove redundant null checks 



The null checks are redundant as they were already dereferenced
previously, as reported by Coverity; therefore the null checks
are removed.

This fixes 7 REVERSE_INULL issues reported by Coverity.

Reviewed-by: default avatarHarry Wentland <harry.wentland@amd.com>
Acked-by: default avatarHamza Mahfooz <hamza.mahfooz@amd.com>
Signed-off-by: default avatarAlex Hung <alex.hung@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 9e6da7b7

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn32/dcn32_clk_mgr.c

+1 −1
Original line number Diff line number Diff line
@@ -553,7 +553,7 @@ static void dcn32_auto_dpm_test_log( 
	//

	//				AutoDPMTest: clk1:%d - clk2:%d - clk3:%d - clk4:%d\n"

	////////////////////////////////////////////////////////////////////////////

	if (new_clocks && active_pipe_count > 0 &&

	if (active_pipe_count > 0 &&

		new_clocks->dramclk_khz > 0 &&

		new_clocks->fclk_khz > 0 &&

		new_clocks->dcfclk_khz > 0 &&

drivers/gpu/drm/amd/display/dc/core/dc.c

+2 −2
Original line number Diff line number Diff line
@@ -2640,7 +2640,7 @@ static enum surface_update_type det_surface_update(const struct dc *dc, 


		if (u->plane_info)

			format = u->plane_info->format;

		else if (u->surface)

		else

			format = u->surface->format;



		if (dce_use_lut(format))
@@ -2741,7 +2741,7 @@ static enum surface_update_type check_update_surfaces_for_stream( 
		if (stream_update->mst_bw_update)

			su_flags->bits.mst_bw = 1;



		if (stream_update->stream && stream_update->stream->freesync_on_desktop &&

		if (stream_update->stream->freesync_on_desktop &&

			(stream_update->vrr_infopacket || stream_update->allow_freesync ||

				stream_update->vrr_active_variable || stream_update->vrr_active_fixed))

			su_flags->bits.fams_changed = 1;

drivers/gpu/drm/amd/display/dc/core/dc_resource.c

+1 −1
Original line number Diff line number Diff line
@@ -2099,7 +2099,7 @@ int resource_get_odm_slice_dst_width(struct pipe_ctx *otg_master, 
			timing->h_border_right;

	width = h_active / count;



	if (otg_master->stream_res.tg && otg_master->stream)

	if (otg_master->stream_res.tg)

		two_pixel_alignment_required =

				otg_master->stream_res.tg->funcs->is_two_pixels_per_container(timing) ||

				/*

drivers/gpu/drm/amd/display/dc/dml2/dml21/dml21_translation_helper.c

+1 −3
Original line number Diff line number Diff line
@@ -102,9 +102,7 @@ void dml21_apply_soc_bb_overrides(struct dml2_initialize_instance_in_out *dml_in 
	struct dml2_soc_state_table *dml_clk_table = &dml_soc_bb->clk_table;



	/* override clocks if smu is present */

	if (in_dc->clk_mgr &&

			in_dc->clk_mgr->funcs->is_smu_present &&

			in_dc->clk_mgr->funcs->is_smu_present(in_dc->clk_mgr)) {

	if (in_dc->clk_mgr->funcs->is_smu_present && in_dc->clk_mgr->funcs->is_smu_present(in_dc->clk_mgr)) {

		/* dcfclk */

		if (dc_clk_table->num_entries_per_clk.num_dcfclk_levels) {

			dml_clk_table->dcfclk.num_clk_values = dc_clk_table->num_entries_per_clk.num_dcfclk_levels;

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

+3 −5
Original line number Diff line number Diff line
@@ -742,13 +742,11 @@ void dce110_edp_wait_for_hpd_ready( 
		return;

	}



	if (link != NULL) {

	if (link->panel_config.pps.extra_t3_ms > 0) {

		int extra_t3_in_ms = link->panel_config.pps.extra_t3_ms;



		msleep(extra_t3_in_ms);

	}

	}



	dal_gpio_open(hpd, GPIO_MODE_INTERRUPT);