Commit 15438b32 authored by Animesh Manna's avatar Animesh Manna
Browse files

drm/i915/alpm: Add compute config for lobf 



Link Off Between Active Frames, is a new feature for eDP
that allows the panel to go to lower power state after
transmission of data. This is a feature on top of ALPM, AS SDP.
Add compute config during atomic-check phase.

v1: RFC version.
v2: Add separate flag for auxless-alpm. [Jani]
v3:
- intel_dp->lobf_supported replaced with crtc_state->has_lobf. [Jouni]
- Add DISPLAY_VER() check. [Jouni]
- Modify function name of get_aux_less_status. [Jani]
v4: Add enum alpm_mode to hold the aux-wake/less capability.
v5: Add alpm_dpcd to intel_dp and use aux_wake_supported()/
aux_less_wake_supported() instead of enum alpm_mode. [Jouni]

Reviewed-by: default avatarJouni Högander <jouni.hogander@intel.com>
Signed-off-by: default avatarAnimesh Manna <animesh.manna@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240529200742.1694401-5-animesh.manna@intel.com
parent b0946981

drivers/gpu/drm/i915/display/intel_alpm.c

+61 −0
Original line number Diff line number Diff line
@@ -11,6 +11,26 @@ 
#include "intel_dp_aux.h"

#include "intel_psr_regs.h"



static bool intel_alpm_aux_wake_supported(struct intel_dp *intel_dp)

{

	return intel_dp->alpm_dpcd & DP_ALPM_CAP;

}



static bool intel_alpm_aux_less_wake_supported(struct intel_dp *intel_dp)

{

	return intel_dp->alpm_dpcd & DP_ALPM_AUX_LESS_CAP;

}



void intel_alpm_init_dpcd(struct intel_dp *intel_dp)

{

	u8 dpcd;



	if (drm_dp_dpcd_readb(&intel_dp->aux, DP_RECEIVER_ALPM_CAP, &dpcd) < 0)

		return;



	intel_dp->alpm_dpcd = dpcd;

}



/*

 * See Bspec: 71632 for the table

 *
@@ -243,6 +263,47 @@ bool intel_alpm_compute_params(struct intel_dp *intel_dp, 
	return true;

}



void intel_alpm_lobf_compute_config(struct intel_dp *intel_dp,

				    struct intel_crtc_state *crtc_state,

				    struct drm_connector_state *conn_state)

{

	struct drm_i915_private *i915 = dp_to_i915(intel_dp);

	struct drm_display_mode *adjusted_mode = &crtc_state->hw.adjusted_mode;

	int waketime_in_lines, first_sdp_position;

	int context_latency, guardband;



	if (!intel_dp_is_edp(intel_dp))

		return;



	if (DISPLAY_VER(i915) < 20)

		return;



	if (!intel_dp_as_sdp_supported(intel_dp))

		return;



	if (crtc_state->has_psr)

		return;



	if (!(intel_alpm_aux_wake_supported(intel_dp) ||

	      intel_alpm_aux_less_wake_supported(intel_dp)))

		return;



	if (!intel_alpm_compute_params(intel_dp, crtc_state))

		return;



	context_latency = adjusted_mode->crtc_vblank_start - adjusted_mode->crtc_vdisplay;

	guardband = adjusted_mode->crtc_vtotal -

		    adjusted_mode->crtc_vdisplay - context_latency;

	first_sdp_position = adjusted_mode->crtc_vtotal - adjusted_mode->crtc_vsync_start;

	if (intel_alpm_aux_less_wake_supported(intel_dp))

		waketime_in_lines = intel_dp->alpm_parameters.io_wake_lines;

	else

		waketime_in_lines = intel_dp->alpm_parameters.fast_wake_lines;



	crtc_state->has_lobf = (context_latency + guardband) >

		(first_sdp_position + waketime_in_lines);

}



static void lnl_alpm_configure(struct intel_dp *intel_dp)

{

	struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);

drivers/gpu/drm/i915/display/intel_alpm.h

+5 −0
Original line number Diff line number Diff line
@@ -10,9 +10,14 @@ 


struct intel_dp;

struct intel_crtc_state;

struct drm_connector_state;



void intel_alpm_init_dpcd(struct intel_dp *intel_dp);

bool intel_alpm_compute_params(struct intel_dp *intel_dp,

			       struct intel_crtc_state *crtc_state);

void intel_alpm_lobf_compute_config(struct intel_dp *intel_dp,

				    struct intel_crtc_state *crtc_state,

				    struct drm_connector_state *conn_state);

void intel_alpm_configure(struct intel_dp *intel_dp);



#endif

drivers/gpu/drm/i915/display/intel_display_types.h

+5 −0
Original line number Diff line number Diff line
@@ -1410,6 +1410,9 @@ struct intel_crtc_state { 


	/* for loading single buffered registers during vblank */

	struct drm_vblank_work vblank_work;



	/* LOBF flag */

	bool has_lobf;

};



enum intel_pipe_crc_source {
@@ -1846,6 +1849,8 @@ struct intel_dp { 
		u8 silence_period_sym_clocks;

		u8 lfps_half_cycle_num_of_syms;

	} alpm_parameters;



	u8 alpm_dpcd;

};



enum lspcon_vendor {

drivers/gpu/drm/i915/display/intel_dp.c

+4 −0
Original line number Diff line number Diff line
@@ -48,6 +48,7 @@ 
#include "i915_drv.h"

#include "i915_irq.h"

#include "i915_reg.h"

#include "intel_alpm.h"

#include "intel_atomic.h"

#include "intel_audio.h"

#include "intel_backlight.h"
@@ -3000,6 +3001,7 @@ intel_dp_compute_config(struct intel_encoder *encoder, 
	intel_vrr_compute_config(pipe_config, conn_state);

	intel_dp_compute_as_sdp(intel_dp, pipe_config);

	intel_psr_compute_config(intel_dp, pipe_config, conn_state);

	intel_alpm_lobf_compute_config(intel_dp, pipe_config, conn_state);

	intel_dp_drrs_compute_config(connector, pipe_config, link_bpp_x16);

	intel_dp_compute_vsc_sdp(intel_dp, pipe_config, conn_state);

	intel_dp_compute_hdr_metadata_infoframe_sdp(intel_dp, pipe_config, conn_state);
@@ -6513,6 +6515,8 @@ static bool intel_edp_init_connector(struct intel_dp *intel_dp, 
	 */

	intel_hpd_enable_detection(encoder);



	intel_alpm_init_dpcd(intel_dp);



	/* Cache DPCD and EDID for edp. */

	has_dpcd = intel_edp_init_dpcd(intel_dp, intel_connector);