Commit 1622711b authored by Sung Lee's avatar Sung Lee Committed by Alex Deucher
Browse files

drm/amd/display: Add more Clock Sources to DCN2.1 



[WHY]
When enabling HDMI on ComboPHY, there are not
enough clock sources to complete display detection.

[HOW]
Initialize more clock sources.

Signed-off-by: default avatarSung Lee <sung.lee@amd.com>
Reviewed-by: default avatarTony Cheng <Tony.Cheng@amd.com>
Acked-by: default avatarAnson Jacob <Anson.Jacob@amd.com>
Tested-by: default avatarDaniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 8866a67a

drivers/gpu/drm/amd/display/dc/dcn21/dcn21_resource.c

+10 −0
Original line number Diff line number Diff line
@@ -906,6 +906,8 @@ enum dcn20_clk_src_array_id { 
	DCN20_CLK_SRC_PLL0,

	DCN20_CLK_SRC_PLL1,

	DCN20_CLK_SRC_PLL2,

	DCN20_CLK_SRC_PLL3,

	DCN20_CLK_SRC_PLL4,

	DCN20_CLK_SRC_TOTAL_DCN21

};
@@ -2030,6 +2032,14 @@ static bool dcn21_resource_construct( 
			dcn21_clock_source_create(ctx, ctx->dc_bios,

				CLOCK_SOURCE_COMBO_PHY_PLL2,

				&clk_src_regs[2], false);

	pool->base.clock_sources[DCN20_CLK_SRC_PLL3] =

			dcn21_clock_source_create(ctx, ctx->dc_bios,

				CLOCK_SOURCE_COMBO_PHY_PLL3,

				&clk_src_regs[3], false);

	pool->base.clock_sources[DCN20_CLK_SRC_PLL4] =

			dcn21_clock_source_create(ctx, ctx->dc_bios,

				CLOCK_SOURCE_COMBO_PHY_PLL4,

				&clk_src_regs[4], false);



	pool->base.clk_src_count = DCN20_CLK_SRC_TOTAL_DCN21;