Unverified Commit 164f66de authored by Chunyan Zhang's avatar Chunyan Zhang Committed by Palmer Dabbelt
Browse files

riscv: Remove duplicated GET_RM 



The macro GET_RM defined twice in this file, one can be removed.

Reviewed-by: default avatarAlexandre Ghiti <alexghiti@rivosinc.com>
Signed-off-by: default avatarChunyan Zhang <zhangchunyan@iscas.ac.cn>
Fixes: 956d705d ("riscv: Unaligned load/store handling for M_MODE")
Cc: stable@vger.kernel.org
Link: https://lore.kernel.org/r/20241008094141.549248-3-zhangchunyan@iscas.ac.cn


Signed-off-by: default avatarPalmer Dabbelt <palmer@rivosinc.com>
parent 46d4e5ac

arch/riscv/kernel/traps_misaligned.c

+0 −2
Original line number Diff line number Diff line
@@ -136,8 +136,6 @@ 
#define REG_PTR(insn, pos, regs)	\

	(ulong *)((ulong)(regs) + REG_OFFSET(insn, pos))



#define GET_RM(insn)			(((insn) >> 12) & 7)



#define GET_RS1(insn, regs)		(*REG_PTR(insn, SH_RS1, regs))

#define GET_RS2(insn, regs)		(*REG_PTR(insn, SH_RS2, regs))

#define GET_RS1S(insn, regs)		(*REG_PTR(RVC_RS1S(insn), 0, regs))