Commit 16b25920 authored by Paul Mundt's avatar Paul Mundt
Browse files

sh: migrate SH_CLK_MD to mode pin API. 



This kills off the hardcoded SH_CLK_MD introduced by the SH-2 boards and
converts over to the mode pin API.

Signed-off-by: default avatarPaul Mundt <lethal@linux-sh.org>
parent a7bcf21e

arch/sh/Kconfig

+0 −9
Original line number Diff line number Diff line
@@ -567,15 +567,6 @@ config SH_CLK_CPG_LEGACY 
	def_bool y if !CPU_SUBTYPE_SH7785 && !ARCH_SHMOBILE && \

		      !CPU_SHX3 && !CPU_SUBTYPE_SH7757



config SH_CLK_MD

	int "CPU Mode Pin Setting"

	depends on CPU_SH2

	default 6 if CPU_SUBTYPE_SH7206

	default 5 if CPU_SUBTYPE_SH7619

	default 0

	help

	  MD2 - MD0 pin setting.



source "kernel/time/Kconfig"



endmenu

arch/sh/boards/mach-se/7206/setup.c

+6 −0
Original line number Diff line number Diff line
@@ -79,6 +79,11 @@ static int __init se7206_devices_setup(void) 
}

__initcall(se7206_devices_setup);



static int se7206_mode_pins(void)

{

	return MODE_PIN1 | MODE_PIN2;

}



/*

 * The Machine Vector

 */
@@ -87,4 +92,5 @@ static struct sh_machine_vector mv_se __initmv = { 
	.mv_name		= "SolutionEngine",

	.mv_nr_irqs		= 256,

	.mv_init_irq		= init_se7206_IRQ,

	.mv_mode_pins		= se7206_mode_pins,

};

arch/sh/boards/mach-se/board-se7619.c

+6 −0
Original line number Diff line number Diff line
@@ -11,6 +11,11 @@ 
#include <asm/io.h>

#include <asm/machvec.h>



static int se7619_mode_pins(void)

{

	return MODE_PIN2 | MODE_PIN0;

}



/*

 * The Machine Vector

 */
@@ -18,4 +23,5 @@ 
static struct sh_machine_vector mv_se __initmv = {

	.mv_name		= "SolutionEngine",

	.mv_nr_irqs		= 108,

	.mv_mode_pins		= se7619_mode_pins,

};

arch/sh/kernel/cpu/sh2/clock-sh7619.c

+12 −10
Original line number Diff line number Diff line
@@ -14,24 +14,18 @@ 
 */

#include <linux/init.h>

#include <linux/kernel.h>

#include <linux/io.h>

#include <asm/clock.h>

#include <asm/freq.h>

#include <asm/io.h>

#include <asm/processor.h>



static const int pll1rate[] = {1,2};

static const int pfc_divisors[] = {1,2,0,4};



#if (CONFIG_SH_CLK_MD == 1) || (CONFIG_SH_CLK_MD == 2)

#define PLL2 (4)

#elif (CONFIG_SH_CLK_MD == 5) || (CONFIG_SH_CLK_MD == 6)

#define PLL2 (2)

#else

#error "Illigal Clock Mode!"

#endif

static unsigned int pll2_mult;



static void master_clk_init(struct clk *clk)

{

	clk->rate *= PLL2 * pll1rate[(__raw_readw(FREQCR) >> 8) & 7];

	clk->rate *= pll2_mult * pll1rate[(__raw_readw(FREQCR) >> 8) & 7];

}



static struct clk_ops sh7619_master_clk_ops = {
@@ -70,6 +64,14 @@ static struct clk_ops *sh7619_clk_ops[] = { 


void __init arch_init_clk_ops(struct clk_ops **ops, int idx)

{

	if (test_mode_pin(MODE_PIN2 | MODE_PIN0) ||

	    test_mode_pin(MODE_PIN2 | MODE_PIN1))

		pll2_mult = 2;

	else if (test_mode_pin(MODE_PIN0) || test_mode_pin(MODE_PIN1))

		pll2_mult = 4;



	BUG_ON(!pll2_mult);



	if (idx < ARRAY_SIZE(sh7619_clk_ops))

		*ops = sh7619_clk_ops[idx];

}

arch/sh/kernel/cpu/sh2a/clock-sh7201.c

+10 −10
Original line number Diff line number Diff line
@@ -22,19 +22,12 @@ static const int pll1rate[]={1,2,3,4,6,8}; 
static const int pfc_divisors[]={1,2,3,4,6,8,12};

#define ifc_divisors pfc_divisors



#if (CONFIG_SH_CLK_MD == 0)

#define PLL2 (4)

#elif (CONFIG_SH_CLK_MD == 2)

#define PLL2 (2)

#elif (CONFIG_SH_CLK_MD == 3)

#define PLL2 (1)

#else

#error "Illegal Clock Mode!"

#endif

static unsigned int pll2_mult;



static void master_clk_init(struct clk *clk)

{

	return 10000000 * PLL2 * pll1rate[(__raw_readw(FREQCR) >> 8) & 0x0007];

	clk->rate = 10000000 * pll2_mult *

	       pll1rate[(__raw_readw(FREQCR) >> 8) & 0x0007];

}



static struct clk_ops sh7201_master_clk_ops = {
@@ -80,6 +73,13 @@ static struct clk_ops *sh7201_clk_ops[] = { 


void __init arch_init_clk_ops(struct clk_ops **ops, int idx)

{

	if (test_mode_pin(MODE_PIN1 | MODE_PIN0))

		pll2_mult = 1;

	else if (test_mode_pin(MODE_PIN1))

		pll2_mult = 2;

	else

		pll2_mult = 4;



	if (idx < ARRAY_SIZE(sh7201_clk_ops))

		*ops = sh7201_clk_ops[idx];

}