Commit 16c0f95d authored by Frank Wunderlich's avatar Frank Wunderlich Committed by Heiko Stuebner
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arm64: dts: rockchip: Add sata nodes to rk356x



RK356x supports up to 3 sata controllers which were compatible with the
existing snps,dwc-ahci binding.

Signed-off-by: default avatarFrank Wunderlich <frank-w@public-files.de>
Link: https://lore.kernel.org/r/20220311210357.222830-7-linux@fw-web.de


Signed-off-by: default avatarHeiko Stuebner <heiko@sntech.de>
parent 4246d0ba
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+14 −0
Original line number Diff line number Diff line
@@ -8,6 +8,20 @@
/ {
	compatible = "rockchip,rk3568";

	sata0: sata@fc000000 {
		compatible = "rockchip,rk3568-dwc-ahci", "snps,dwc-ahci";
		reg = <0 0xfc000000 0 0x1000>;
		clocks = <&cru ACLK_SATA0>, <&cru CLK_SATA0_PMALIVE>,
			 <&cru CLK_SATA0_RXOOB>;
		clock-names = "sata", "pmalive", "rxoob";
		interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>;
		phys = <&combphy0 PHY_TYPE_SATA>;
		phy-names = "sata-phy";
		ports-implemented = <0x1>;
		power-domains = <&power RK3568_PD_PIPE>;
		status = "disabled";
	};

	pipe_phy_grf0: syscon@fdc70000 {
		compatible = "rockchip,rk3568-pipe-phy-grf", "syscon";
		reg = <0x0 0xfdc70000 0x0 0x1000>;
+28 −0
Original line number Diff line number Diff line
@@ -230,6 +230,34 @@ scmi_shmem: sram@0 {
		};
	};

	sata1: sata@fc400000 {
		compatible = "rockchip,rk3568-dwc-ahci", "snps,dwc-ahci";
		reg = <0 0xfc400000 0 0x1000>;
		clocks = <&cru ACLK_SATA1>, <&cru CLK_SATA1_PMALIVE>,
			 <&cru CLK_SATA1_RXOOB>;
		clock-names = "sata", "pmalive", "rxoob";
		interrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>;
		phys = <&combphy1 PHY_TYPE_SATA>;
		phy-names = "sata-phy";
		ports-implemented = <0x1>;
		power-domains = <&power RK3568_PD_PIPE>;
		status = "disabled";
	};

	sata2: sata@fc800000 {
		compatible = "rockchip,rk3568-dwc-ahci", "snps,dwc-ahci";
		reg = <0 0xfc800000 0 0x1000>;
		clocks = <&cru ACLK_SATA2>, <&cru CLK_SATA2_PMALIVE>,
			 <&cru CLK_SATA2_RXOOB>;
		clock-names = "sata", "pmalive", "rxoob";
		interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
		phys = <&combphy2 PHY_TYPE_SATA>;
		phy-names = "sata-phy";
		ports-implemented = <0x1>;
		power-domains = <&power RK3568_PD_PIPE>;
		status = "disabled";
	};

	gic: interrupt-controller@fd400000 {
		compatible = "arm,gic-v3";
		reg = <0x0 0xfd400000 0 0x10000>, /* GICD */