Commit 16e7a0db authored by Suraj Kandpal's avatar Suraj Kandpal Committed by Uma Shankar
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drm/i915/vdsc: Check slice design requirement 



Add function to check if slice design requirements are being
met as defined in Bspec: 49259 in the section
Slice Design Requirement

--v7
-remove full bspec link [Jani]
-rename intel_dsc_check_slice_design_req to
intel_dsc_slice_dimensions_valid [Jani]

--v8
-fix condition to check if slice width and height are
of two
-fix minimum pixel in slice condition

--v10
-condition should be < rather then >= [Uma]

Cc: Uma Shankar <uma.shankar@intel.com>
Signed-off-by: default avatarSuraj Kandpal <suraj.kandpal@intel.com>
Reviewed-by: default avatarUma Shankar <uma.shankar@intel.com>
Signed-off-by: default avatarUma Shankar <uma.shankar@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20230309062855.393087-7-suraj.kandpal@intel.com
parent 9aeabe19

drivers/gpu/drm/i915/display/intel_vdsc.c

+32 −0
Original line number Diff line number Diff line
@@ -448,6 +448,29 @@ calculate_rc_params(struct rc_parameters *rc, 
	}

}



static int intel_dsc_slice_dimensions_valid(struct intel_crtc_state *pipe_config,

					    struct drm_dsc_config *vdsc_cfg)

{

	if (pipe_config->output_format == INTEL_OUTPUT_FORMAT_RGB ||

	    pipe_config->output_format == INTEL_OUTPUT_FORMAT_YCBCR444) {

		if (vdsc_cfg->slice_height > 4095)

			return -EINVAL;

		if (vdsc_cfg->slice_height * vdsc_cfg->slice_width < 15000)

			return -EINVAL;

	} else if (pipe_config->output_format == INTEL_OUTPUT_FORMAT_YCBCR420) {

		if (vdsc_cfg->slice_width % 2)

			return -EINVAL;

		if (vdsc_cfg->slice_height % 2)

			return -EINVAL;

		if (vdsc_cfg->slice_height > 4094)

			return -EINVAL;

		if (vdsc_cfg->slice_height * vdsc_cfg->slice_width < 30000)

			return -EINVAL;

	}



	return 0;

}



int intel_dsc_compute_params(struct intel_crtc_state *pipe_config)

{

	struct intel_crtc *crtc = to_intel_crtc(pipe_config->uapi.crtc);
@@ -456,11 +479,20 @@ int intel_dsc_compute_params(struct intel_crtc_state *pipe_config) 
	u16 compressed_bpp = pipe_config->dsc.compressed_bpp;

	const struct rc_parameters *rc_params;

	struct rc_parameters *rc = NULL;

	int err;

	u8 i = 0;



	vdsc_cfg->pic_width = pipe_config->hw.adjusted_mode.crtc_hdisplay;

	vdsc_cfg->slice_width = DIV_ROUND_UP(vdsc_cfg->pic_width,

					     pipe_config->dsc.slice_count);



	err = intel_dsc_slice_dimensions_valid(pipe_config, vdsc_cfg);



	if (err) {

		drm_dbg_kms(&dev_priv->drm, "Slice dimension requirements not met\n");

		return err;

	}



	/*

	 * According to DSC 1.2 specs if colorspace is YCbCr then convert_rgb is 0

	 * else 1