Commit 16ef63ac authored by Jakub Kicinski's avatar Jakub Kicinski
Browse files

Merge branch 'net-airoha-improve-hwfd-buffer-descriptor-queues-setup' 

Lorenzo Bianconi says:

====================
net: airoha: Improve hwfd buffer/descriptor queues setup

Compute the number of hwfd buffers/descriptors according to the reserved
memory size if provided via DTS.

Reduce the required hwfd buffers queue size for QDMA1.

v3: https://lore.kernel.org/20250618-airoha-hw-num-desc-v3-0-18a6487cd75e@kernel.org
v1: https://lore.kernel.org/20250615-airoha-hw-num-desc-v1-0-8f88daa4abd7@kernel.org
====================

Link: https://patch.msgid.link/20250619-airoha-hw-num-desc-v4-0-49600a9b319a@kernel.org


Signed-off-by: default avatarJakub Kicinski <kuba@kernel.org>
parents dccf87ea 7b46bdae

drivers/net/ethernet/airoha/airoha_eth.c

+16 −11
Original line number Diff line number Diff line
@@ -1065,23 +1065,18 @@ static void airoha_qdma_cleanup_tx_queue(struct airoha_queue *q) 


static int airoha_qdma_init_hfwd_queues(struct airoha_qdma *qdma)

{

	int size, index, num_desc = HW_DSCP_NUM;

	struct airoha_eth *eth = qdma->eth;

	int id = qdma - &eth->qdma[0];

	u32 status, buf_size;

	dma_addr_t dma_addr;

	const char *name;

	int size, index;

	u32 status;



	size = HW_DSCP_NUM * sizeof(struct airoha_qdma_fwd_desc);

	if (!dmam_alloc_coherent(eth->dev, size, &dma_addr, GFP_KERNEL))

		return -ENOMEM;



	airoha_qdma_wr(qdma, REG_FWD_DSCP_BASE, dma_addr);



	name = devm_kasprintf(eth->dev, GFP_KERNEL, "qdma%d-buf", id);

	if (!name)

		return -ENOMEM;



	buf_size = id ? AIROHA_MAX_PACKET_SIZE / 2 : AIROHA_MAX_PACKET_SIZE;

	index = of_property_match_string(eth->dev->of_node,

					 "memory-region-names", name);

	if (index >= 0) {
@@ -1099,8 +1094,12 @@ static int airoha_qdma_init_hfwd_queues(struct airoha_qdma *qdma) 
		rmem = of_reserved_mem_lookup(np);

		of_node_put(np);

		dma_addr = rmem->base;

		/* Compute the number of hw descriptors according to the

		 * reserved memory size and the payload buffer size

		 */

		num_desc = div_u64(rmem->size, buf_size);

	} else {

		size = AIROHA_MAX_PACKET_SIZE * HW_DSCP_NUM;

		size = buf_size * num_desc;

		if (!dmam_alloc_coherent(eth->dev, size, &dma_addr,

					 GFP_KERNEL))

			return -ENOMEM;
@@ -1108,15 +1107,21 @@ static int airoha_qdma_init_hfwd_queues(struct airoha_qdma *qdma) 


	airoha_qdma_wr(qdma, REG_FWD_BUF_BASE, dma_addr);



	size = num_desc * sizeof(struct airoha_qdma_fwd_desc);

	if (!dmam_alloc_coherent(eth->dev, size, &dma_addr, GFP_KERNEL))

		return -ENOMEM;



	airoha_qdma_wr(qdma, REG_FWD_DSCP_BASE, dma_addr);

	/* QDMA0: 2KB. QDMA1: 1KB */

	airoha_qdma_rmw(qdma, REG_HW_FWD_DSCP_CFG,

			HW_FWD_DSCP_PAYLOAD_SIZE_MASK,

			FIELD_PREP(HW_FWD_DSCP_PAYLOAD_SIZE_MASK, 0));

			FIELD_PREP(HW_FWD_DSCP_PAYLOAD_SIZE_MASK, !!id));

	airoha_qdma_rmw(qdma, REG_FWD_DSCP_LOW_THR, FWD_DSCP_LOW_THR_MASK,

			FIELD_PREP(FWD_DSCP_LOW_THR_MASK, 128));

	airoha_qdma_rmw(qdma, REG_LMGR_INIT_CFG,

			LMGR_INIT_START | LMGR_SRAM_MODE_MASK |

			HW_FWD_DESC_NUM_MASK,

			FIELD_PREP(HW_FWD_DESC_NUM_MASK, HW_DSCP_NUM) |

			FIELD_PREP(HW_FWD_DESC_NUM_MASK, num_desc) |

			LMGR_INIT_START | LMGR_SRAM_MODE_MASK);



	return read_poll_timeout(airoha_qdma_rr, status,