Commit 17939df3 authored by Claudiu Beznea's avatar Claudiu Beznea Committed by Geert Uytterhoeven
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clk: renesas: rzg2l: Use core->name for clock name 



core->name already contains the clock name thus, there is no
need to check the GET_SHIFT(core->conf) to decide on it.

Signed-off-by: default avatarClaudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
Reviewed-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20230912045157.177966-11-claudiu.beznea.uj@bp.renesas.com


Signed-off-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
parent f3ea14c6

drivers/clk/renesas/rzg2l-cpg.c

+1 −1
Original line number Diff line number Diff line
@@ -265,7 +265,7 @@ rzg2l_cpg_sd_mux_clk_register(const struct cpg_core_clk *core, 
	clk_hw_data->priv = priv;

	clk_hw_data->conf = core->conf;



	init.name = GET_SHIFT(core->conf) ? "sd1" : "sd0";

	init.name = core->name;

	init.ops = &rzg2l_cpg_sd_clk_mux_ops;

	init.flags = 0;

	init.num_parents = core->num_parents;