Commit 17ba9cde authored by Dan Carpenter's avatar Dan Carpenter Committed by Alex Deucher
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drm/amd/display: Fix && vs || typos



These ANDs should be ORs or it will lead to a NULL dereference.

Fixes: fb5a3d03 ("drm/amd/display: Add NULL test for 'timing generator' in 'dcn21_set_pipe()'")
Fixes: 886571d2 ("drm/amd/display: Fix 'panel_cntl' could be null in 'dcn21_set_backlight_level()'")
Reviewed-by: default avatarAnthony Koo <anthony.koo@amd.com>
Signed-off-by: default avatarDan Carpenter <dan.carpenter@linaro.org>
Signed-off-by: default avatarHamza Mahfooz <hamza.mahfooz@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent a0c9956a
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+2 −2
Original line number Diff line number Diff line
@@ -211,7 +211,7 @@ void dcn21_set_pipe(struct pipe_ctx *pipe_ctx)
	struct dmcu *dmcu = pipe_ctx->stream->ctx->dc->res_pool->dmcu;
	uint32_t otg_inst;

	if (!abm && !tg && !panel_cntl)
	if (!abm || !tg || !panel_cntl)
		return;

	otg_inst = tg->inst;
@@ -245,7 +245,7 @@ bool dcn21_set_backlight_level(struct pipe_ctx *pipe_ctx,
	struct panel_cntl *panel_cntl = pipe_ctx->stream->link->panel_cntl;
	uint32_t otg_inst;

	if (!abm && !tg && !panel_cntl)
	if (!abm || !tg || !panel_cntl)
		return false;

	otg_inst = tg->inst;