Commit 17c05cb0 authored by Catalin Marinas's avatar Catalin Marinas
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Merge branches 'for-next/misc', 'for-next/kselftest', 'for-next/efi-preempt',... 

Merge branches 'for-next/misc', 'for-next/kselftest', 'for-next/efi-preempt', 'for-next/assembler-macro', 'for-next/typos', 'for-next/sme-ptrace-disable', 'for-next/local-tlbi-page-reused', 'for-next/mpam', 'for-next/acpi' and 'for-next/documentation', remote-tracking branch 'arm64/for-next/perf' into for-next/core

* arm64/for-next/perf:
  perf: arm_spe: Add support for filtering on data source
  perf: Add perf_event_attr::config4
  perf/imx_ddr: Add support for PMU in DB (system interconnects)
  perf/imx_ddr: Get and enable optional clks
  perf/imx_ddr: Move ida_alloc() from ddr_perf_init() to ddr_perf_probe()
  dt-bindings: perf: fsl-imx-ddr: Add compatible string for i.MX8QM, i.MX8QXP and i.MX8DXL
  arch_topology: Provide a stub topology_core_has_smt() for !CONFIG_GENERIC_ARCH_TOPOLOGY
  perf/arm-ni: Fix and optimise register offset calculation
  perf: arm_pmuv3: Add new Cortex and C1 CPU PMUs
  perf: arm_cspmu: fix error handling in arm_cspmu_impl_unregister()
  perf/arm-ni: Add NoC S3 support
  perf/arm_cspmu: nvidia: Add pmevfiltr2 support
  perf/arm_cspmu: nvidia: Add revision id matching
  perf/arm_cspmu: Add pmpidr support
  perf/arm_cspmu: Add callback to reset filter config
  perf: arm_pmuv3: Don't use PMCCNTR_EL0 on SMT cores

* for-next/misc:
  : Miscellaneous patches
  arm64: atomics: lse: Remove unused parameters from ATOMIC_FETCH_OP_AND macros
  arm64: remove duplicate ARCH_HAS_MEM_ENCRYPT
  arm64: mm: use untagged address to calculate page index
  arm64: mm: make linear mapping permission update more robust for patial range
  arm64/mm: Elide TLB flush in certain pte protection transitions
  arm64/mm: Rename try_pgd_pgtable_alloc_init_mm
  arm64/mm: Allow __create_pgd_mapping() to propagate pgtable_alloc() errors
  arm64: add unlikely hint to MTE async fault check in el0_svc_common
  arm64: acpi: add newline to deferred APEI warning
  arm64: entry: Clean out some indirection
  arm64/mm: Ensure PGD_SIZE is aligned to 64 bytes when PA_BITS = 52
  arm64/mm: Drop cpu_set_[default|idmap]_tcr_t0sz()
  arm64: remove unused ARCH_PFN_OFFSET
  arm64: use SOFTIRQ_ON_OWN_STACK for enabling softirq stack
  arm64: Remove assertion on CONFIG_VMAP_STACK

* for-next/kselftest:
  : arm64 kselftest patches
  kselftest/arm64: Align zt-test register dumps

* for-next/efi-preempt:
  : arm64: Make EFI calls preemptible
  arm64/efi: Call EFI runtime services without disabling preemption
  arm64/efi: Move uaccess en/disable out of efi_set_pgd()
  arm64/efi: Drop efi_rt_lock spinlock from EFI arch wrapper
  arm64/fpsimd: Permit kernel mode NEON with IRQs off
  arm64/fpsimd: Don't warn when EFI execution context is preemptible
  efi/runtime-wrappers: Keep track of the efi_runtime_lock owner
  efi: Add missing static initializer for efi_mm::cpus_allowed_lock

* for-next/assembler-macro:
  : arm64: Replace __ASSEMBLY__ with __ASSEMBLER__ in headers
  arm64: Replace __ASSEMBLY__ with __ASSEMBLER__ in non-uapi headers
  arm64: Replace __ASSEMBLY__ with __ASSEMBLER__ in uapi headers

* for-next/typos:
  : Random typo/spelling fixes
  arm64: Fix double word in comments
  arm64: Fix typos and spelling errors in comments

* for-next/sme-ptrace-disable:
  : Support disabling streaming mode via ptrace on SME only systems
  kselftest/arm64: Cover disabling streaming mode without SVE in fp-ptrace
  kselftst/arm64: Test NT_ARM_SVE FPSIMD format writes on non-SVE systems
  arm64/sme: Support disabling streaming mode via ptrace on SME only systems

* for-next/local-tlbi-page-reused:
  : arm64, mm: avoid TLBI broadcast if page reused in write fault
  arm64, tlbflush: don't TLBI broadcast if page reused in write fault
  mm: add spurious fault fixing support for huge pmd

* for-next/mpam: (34 commits)
  : Basic Arm MPAM driver (more to follow)
  MAINTAINERS: new entry for MPAM Driver
  arm_mpam: Add kunit tests for props_mismatch()
  arm_mpam: Add kunit test for bitmap reset
  arm_mpam: Add helper to reset saved mbwu state
  arm_mpam: Use long MBWU counters if supported
  arm_mpam: Probe for long/lwd mbwu counters
  arm_mpam: Consider overflow in bandwidth counter state
  arm_mpam: Track bandwidth counter state for power management
  arm_mpam: Add mpam_msmon_read() to read monitor value
  arm_mpam: Add helpers to allocate monitors
  arm_mpam: Probe and reset the rest of the features
  arm_mpam: Allow configuration to be applied and restored during cpu online
  arm_mpam: Use a static key to indicate when mpam is enabled
  arm_mpam: Register and enable IRQs
  arm_mpam: Extend reset logic to allow devices to be reset any time
  arm_mpam: Add a helper to touch an MSC from any CPU
  arm_mpam: Reset MSC controls from cpuhp callbacks
  arm_mpam: Merge supported features during mpam_enable() into mpam_class
  arm_mpam: Probe the hardware features resctrl supports
  arm_mpam: Add helpers for managing the locking around the mon_sel registers
  ...

* for-next/acpi:
  : arm64 acpi updates
  ACPI: GTDT: Get rid of acpi_arch_timer_mem_init()

* for-next/documentation:
  : arm64 Documentation updates
  Documentation/arm64: Fix the typo of register names
parents e6a27290 c86d9f87 a7717cad a5baf582 287d1633 337f7e3a a0245b42 cb1fa2e9 ce1e1421 155f8d4e 4b7a59fa

Documentation/arch/arm64/booting.rst

+4 −4
Original line number Diff line number Diff line
@@ -391,13 +391,13 @@ Before jumping into the kernel, the following conditions must be met: 
    - SMCR_EL2.LEN must be initialised to the same value for all CPUs the

      kernel will execute on.



    - HWFGRTR_EL2.nTPIDR2_EL0 (bit 55) must be initialised to 0b01.

    - HFGRTR_EL2.nTPIDR2_EL0 (bit 55) must be initialised to 0b01.



    - HWFGWTR_EL2.nTPIDR2_EL0 (bit 55) must be initialised to 0b01.

    - HFGWTR_EL2.nTPIDR2_EL0 (bit 55) must be initialised to 0b01.



    - HWFGRTR_EL2.nSMPRI_EL1 (bit 54) must be initialised to 0b01.

    - HFGRTR_EL2.nSMPRI_EL1 (bit 54) must be initialised to 0b01.



    - HWFGWTR_EL2.nSMPRI_EL1 (bit 54) must be initialised to 0b01.

    - HFGWTR_EL2.nSMPRI_EL1 (bit 54) must be initialised to 0b01.



  For CPUs with the Scalable Matrix Extension FA64 feature (FEAT_SME_FA64):

Documentation/arch/arm64/sve.rst

+5 −0
Original line number Diff line number Diff line
@@ -402,6 +402,11 @@ The regset data starts with struct user_sve_header, containing: 
  streaming mode and any SETREGSET of NT_ARM_SSVE will enter streaming mode

  if the target was not in streaming mode.



* On systems that do not support SVE it is permitted to use SETREGSET to

  write SVE_PT_REGS_FPSIMD formatted data via NT_ARM_SVE, in this case the

  vector length should be specified as 0. This allows streaming mode to be

  disabled on systems with SME but not SVE.



* If any register data is provided along with SVE_PT_VL_ONEXEC then the

  registers data will be interpreted with the current vector length, not

  the vector length configured for use on exec.

MAINTAINERS

+10 −0
Original line number Diff line number Diff line
@@ -17448,6 +17448,16 @@ S: Maintained 
F:	Documentation/devicetree/bindings/leds/backlight/mps,mp3309c.yaml

F:	drivers/video/backlight/mp3309c.c









MPAM DRIVER









M:	James Morse <james.morse@arm.com>









M:	Ben Horgan <ben.horgan@arm.com>









R:	Reinette Chatre <reinette.chatre@intel.com>









R:	Fenghua Yu <fenghuay@nvidia.com>









S:	Maintained









F:	drivers/resctrl/mpam_*









F:	drivers/resctrl/test_mpam_*









F:	include/linux/arm_mpam.h

















MPS MP2869 DRIVER









M:	Wensheng Wang <wenswang@yeah.net>









L:	linux-hwmon@vger.kernel.org

























arch/arm64/Kconfig



+25
−1






























Original line number
Diff line number
Diff line







@@ -47,7 +47,6 @@ config ARM64







	select ARCH_HAS_SETUP_DMA_OPS









	select ARCH_HAS_SET_DIRECT_MAP









	select ARCH_HAS_SET_MEMORY









	select ARCH_HAS_MEM_ENCRYPT









	select ARCH_HAS_FORCE_DMA_UNENCRYPTED









	select ARCH_STACKWALK









	select ARCH_HAS_STRICT_KERNEL_RWX








@@ -2023,6 +2022,31 @@ config ARM64_TLB_RANGE







	  ARMv8.4-TLBI provides TLBI invalidation instruction that apply to a









	  range of input addresses.



















config ARM64_MPAM









	bool "Enable support for MPAM"









	select ARM64_MPAM_DRIVER if EXPERT	# does nothing yet









	select ACPI_MPAM if ACPI









	help









	  Memory System Resource Partitioning and Monitoring (MPAM) is an









	  optional extension to the Arm architecture that allows each









	  transaction issued to the memory system to be labelled with a









	  Partition identifier (PARTID) and Performance Monitoring Group









	  identifier (PMG).



















	  Memory system components, such as the caches, can be configured with









	  policies to control how much of various physical resources (such as









	  memory bandwidth or cache memory) the transactions labelled with each









	  PARTID can consume.  Depending on the capabilities of the hardware,









	  the PARTID and PMG can also be used as filtering criteria to measure









	  the memory system resource consumption of different parts of a









	  workload.



















	  Use of this extension requires CPU support, support in the









	  Memory System Components (MSC), and a description from firmware









	  of where the MSCs are in the address space.



















	  MPAM is exposed to user-space via the resctrl pseudo filesystem.



















endmenu # "ARMv8.4 architectural features"



















menu "ARMv8.5 architectural features"
































arch/arm64/include/asm/alternative-macros.h



+4
−4






























Original line number
Diff line number
Diff line







@@ -19,7 +19,7 @@







#error "cpucaps have overflown ARM64_CB_BIT"









#endif



















#ifndef __ASSEMBLY__









#ifndef __ASSEMBLER__



















#include <linux/stringify.h>


















@@ -207,7 +207,7 @@ alternative_endif







#define _ALTERNATIVE_CFG(insn1, insn2, cap, cfg, ...)	\









	alternative_insn insn1, insn2, cap, IS_ENABLED(cfg)



















#endif  /*  __ASSEMBLY__  */









#endif  /*  __ASSEMBLER__  */



















/*









 * Usage: asm(ALTERNATIVE(oldinstr, newinstr, cpucap));








@@ -219,7 +219,7 @@ alternative_endif







#define ALTERNATIVE(oldinstr, newinstr, ...)   \









	_ALTERNATIVE_CFG(oldinstr, newinstr, __VA_ARGS__, 1)



















#ifndef __ASSEMBLY__









#ifndef __ASSEMBLER__



















#include <linux/types.h>


















@@ -263,6 +263,6 @@ alternative_has_cap_unlikely(const unsigned long cpucap)







	return true;









}



















#endif /* __ASSEMBLY__ */









#endif /* __ASSEMBLER__ */



















#endif /* __ASM_ALTERNATIVE_MACROS_H */