Commit 1801d87b authored by Selvin Xavier's avatar Selvin Xavier Committed by Leon Romanovsky
Browse files

RDMA/bnxt_re: Support new 5760X P7 devices 



Add basic support for 5760X P7 devices. Add new chip
revisions. The first version support is similar to
the existing P5 adapters. Extend the current support
for P5 adapters to P7 also.

Signed-off-by: default avatarSelvin Xavier <selvin.xavier@broadcom.com>
Link: https://lore.kernel.org/r/1701946060-13931-2-git-send-email-selvin.xavier@broadcom.com


Signed-off-by: default avatarLeon Romanovsky <leon@kernel.org>
parent 288f5359

drivers/infiniband/hw/bnxt_re/hw_counters.c

+2 −2
Original line number Diff line number Diff line
@@ -371,7 +371,7 @@ int bnxt_re_ib_get_hw_stats(struct ib_device *ibdev, 
	}



done:

	return bnxt_qplib_is_chip_gen_p5(rdev->chip_ctx) ?

	return bnxt_qplib_is_chip_gen_p5_p7(rdev->chip_ctx) ?

		BNXT_RE_NUM_EXT_COUNTERS : BNXT_RE_NUM_STD_COUNTERS;

}
@@ -381,7 +381,7 @@ struct rdma_hw_stats *bnxt_re_ib_alloc_hw_port_stats(struct ib_device *ibdev, 
	struct bnxt_re_dev *rdev = to_bnxt_re_dev(ibdev, ibdev);

	int num_counters = 0;



	if (bnxt_qplib_is_chip_gen_p5(rdev->chip_ctx))

	if (bnxt_qplib_is_chip_gen_p5_p7(rdev->chip_ctx))

		num_counters = BNXT_RE_NUM_EXT_COUNTERS;

	else

		num_counters = BNXT_RE_NUM_STD_COUNTERS;

drivers/infiniband/hw/bnxt_re/ib_verbs.c

+5 −5
Original line number Diff line number Diff line
@@ -1023,7 +1023,7 @@ static int bnxt_re_init_user_qp(struct bnxt_re_dev *rdev, struct bnxt_re_pd *pd, 
	bytes = (qplib_qp->sq.max_wqe * qplib_qp->sq.wqe_size);

	/* Consider mapping PSN search memory only for RC QPs. */

	if (qplib_qp->type == CMDQ_CREATE_QP_TYPE_RC) {

		psn_sz = bnxt_qplib_is_chip_gen_p5(rdev->chip_ctx) ?

		psn_sz = bnxt_qplib_is_chip_gen_p5_p7(rdev->chip_ctx) ?

						   sizeof(struct sq_psn_search_ext) :

						   sizeof(struct sq_psn_search);

		psn_nume = (qplib_qp->wqe_mode == BNXT_QPLIB_WQE_MODE_STATIC) ?
@@ -1234,7 +1234,7 @@ static void bnxt_re_adjust_gsi_rq_attr(struct bnxt_re_qp *qp) 
	qplqp = &qp->qplib_qp;

	dev_attr = &rdev->dev_attr;



	if (!bnxt_qplib_is_chip_gen_p5(rdev->chip_ctx)) {

	if (!bnxt_qplib_is_chip_gen_p5_p7(rdev->chip_ctx)) {

		qplqp->rq.max_sge = dev_attr->max_qp_sges;

		if (qplqp->rq.max_sge > dev_attr->max_qp_sges)

			qplqp->rq.max_sge = dev_attr->max_qp_sges;
@@ -1301,7 +1301,7 @@ static void bnxt_re_adjust_gsi_sq_attr(struct bnxt_re_qp *qp, 
	qplqp = &qp->qplib_qp;

	dev_attr = &rdev->dev_attr;



	if (!bnxt_qplib_is_chip_gen_p5(rdev->chip_ctx)) {

	if (!bnxt_qplib_is_chip_gen_p5_p7(rdev->chip_ctx)) {

		entries = bnxt_re_init_depth(init_attr->cap.max_send_wr + 1, uctx);

		qplqp->sq.max_wqe = min_t(u32, entries,

					  dev_attr->max_qp_wqes + 1);
@@ -1328,7 +1328,7 @@ static int bnxt_re_init_qp_type(struct bnxt_re_dev *rdev, 
		goto out;

	}



	if (bnxt_qplib_is_chip_gen_p5(chip_ctx) &&

	if (bnxt_qplib_is_chip_gen_p5_p7(chip_ctx) &&

	    init_attr->qp_type == IB_QPT_GSI)

		qptype = CMDQ_CREATE_QP_TYPE_GSI;

out:
@@ -1527,7 +1527,7 @@ int bnxt_re_create_qp(struct ib_qp *ib_qp, struct ib_qp_init_attr *qp_init_attr, 
		goto fail;



	if (qp_init_attr->qp_type == IB_QPT_GSI &&

	    !(bnxt_qplib_is_chip_gen_p5(rdev->chip_ctx))) {

	    !(bnxt_qplib_is_chip_gen_p5_p7(rdev->chip_ctx))) {

		rc = bnxt_re_create_gsi_qp(qp, pd, qp_init_attr);

		if (rc == -ENODEV)

			goto qp_destroy;

drivers/infiniband/hw/bnxt_re/main.c

+7 −7
Original line number Diff line number Diff line
@@ -128,7 +128,7 @@ static void bnxt_re_set_drv_mode(struct bnxt_re_dev *rdev, u8 mode) 
	struct bnxt_qplib_chip_ctx *cctx;



	cctx = rdev->chip_ctx;

	cctx->modes.wqe_mode = bnxt_qplib_is_chip_gen_p5(rdev->chip_ctx) ?

	cctx->modes.wqe_mode = bnxt_qplib_is_chip_gen_p5_p7(rdev->chip_ctx) ?

			       mode : BNXT_QPLIB_WQE_MODE_STATIC;

	if (bnxt_re_hwrm_qcaps(rdev))

		dev_err(rdev_to_dev(rdev),
@@ -215,7 +215,7 @@ static void bnxt_re_limit_pf_res(struct bnxt_re_dev *rdev) 
	ctx->srqc_count = min_t(u32, BNXT_RE_MAX_SRQC_COUNT,

				attr->max_srq);

	ctx->cq_count = min_t(u32, BNXT_RE_MAX_CQ_COUNT, attr->max_cq);

	if (!bnxt_qplib_is_chip_gen_p5(rdev->chip_ctx))

	if (!bnxt_qplib_is_chip_gen_p5_p7(rdev->chip_ctx))

		for (i = 0; i < MAX_TQM_ALLOC_REQ; i++)

			rdev->qplib_ctx.tqm_ctx.qcount[i] =

			rdev->dev_attr.tqm_alloc_reqs[i];
@@ -264,7 +264,7 @@ static void bnxt_re_set_resource_limits(struct bnxt_re_dev *rdev) 
	memset(&rdev->qplib_ctx.vf_res, 0, sizeof(struct bnxt_qplib_vf_res));

	bnxt_re_limit_pf_res(rdev);



	num_vfs =  bnxt_qplib_is_chip_gen_p5(rdev->chip_ctx) ?

	num_vfs =  bnxt_qplib_is_chip_gen_p5_p7(rdev->chip_ctx) ?

			BNXT_RE_GEN_P5_MAX_VF : rdev->num_vfs;

	if (num_vfs)

		bnxt_re_limit_vf_res(&rdev->qplib_ctx, num_vfs);
@@ -276,7 +276,7 @@ static void bnxt_re_vf_res_config(struct bnxt_re_dev *rdev) 
	if (test_bit(BNXT_RE_FLAG_ERR_DEVICE_DETACHED, &rdev->flags))

		return;

	rdev->num_vfs = pci_sriov_get_totalvfs(rdev->en_dev->pdev);

	if (!bnxt_qplib_is_chip_gen_p5(rdev->chip_ctx)) {

	if (!bnxt_qplib_is_chip_gen_p5_p7(rdev->chip_ctx)) {

		bnxt_re_set_resource_limits(rdev);

		bnxt_qplib_set_func_resources(&rdev->qplib_res, &rdev->rcfw,

					      &rdev->qplib_ctx);
@@ -1216,7 +1216,7 @@ static int bnxt_re_cqn_handler(struct bnxt_qplib_nq *nq, 
#define BNXT_RE_GEN_P5_VF_NQ_DB		0x4000

static u32 bnxt_re_get_nqdb_offset(struct bnxt_re_dev *rdev, u16 indx)

{

	return bnxt_qplib_is_chip_gen_p5(rdev->chip_ctx) ?

	return bnxt_qplib_is_chip_gen_p5_p7(rdev->chip_ctx) ?

		(rdev->is_virtfn ? BNXT_RE_GEN_P5_VF_NQ_DB :

				   BNXT_RE_GEN_P5_PF_NQ_DB) :

				   rdev->en_dev->msix_entries[indx].db_offset;
@@ -1681,7 +1681,7 @@ static int bnxt_re_dev_init(struct bnxt_re_dev *rdev, u8 wqe_mode) 
	bnxt_re_set_resource_limits(rdev);



	rc = bnxt_qplib_alloc_ctx(&rdev->qplib_res, &rdev->qplib_ctx, 0,

				  bnxt_qplib_is_chip_gen_p5(rdev->chip_ctx));

				  bnxt_qplib_is_chip_gen_p5_p7(rdev->chip_ctx));

	if (rc) {

		ibdev_err(&rdev->ibdev,

			  "Failed to allocate QPLIB context: %#x\n", rc);
@@ -1804,7 +1804,7 @@ static void bnxt_re_setup_cc(struct bnxt_re_dev *rdev, bool enable) 
		return;



	/* Currently enabling only for GenP5 adapters */

	if (!bnxt_qplib_is_chip_gen_p5(rdev->chip_ctx))

	if (!bnxt_qplib_is_chip_gen_p5_p7(rdev->chip_ctx))

		return;



	if (enable) {

drivers/infiniband/hw/bnxt_re/qplib_fp.c

+2 −2
Original line number Diff line number Diff line
@@ -991,7 +991,7 @@ int bnxt_qplib_create_qp(struct bnxt_qplib_res *res, struct bnxt_qplib_qp *qp) 


	/* SQ */

	if (qp->type == CMDQ_CREATE_QP_TYPE_RC) {

		psn_sz = bnxt_qplib_is_chip_gen_p5(res->cctx) ?

		psn_sz = bnxt_qplib_is_chip_gen_p5_p7(res->cctx) ?

			 sizeof(struct sq_psn_search_ext) :

			 sizeof(struct sq_psn_search);

	}
@@ -1605,7 +1605,7 @@ static void bnxt_qplib_fill_psn_search(struct bnxt_qplib_qp *qp, 
	flg_npsn = ((swq->next_psn << SQ_PSN_SEARCH_NEXT_PSN_SFT) &

		     SQ_PSN_SEARCH_NEXT_PSN_MASK);



	if (bnxt_qplib_is_chip_gen_p5(qp->cctx)) {

	if (bnxt_qplib_is_chip_gen_p5_p7(qp->cctx)) {

		psns_ext->opcode_start_psn = cpu_to_le32(op_spsn);

		psns_ext->flags_next_psn = cpu_to_le32(flg_npsn);

		psns_ext->start_slot_idx = cpu_to_le16(swq->slot_idx);

drivers/infiniband/hw/bnxt_re/qplib_rcfw.c

+1 −1
Original line number Diff line number Diff line
@@ -852,7 +852,7 @@ int bnxt_qplib_init_rcfw(struct bnxt_qplib_rcfw *rcfw, 
	 */

	if (is_virtfn)

		goto skip_ctx_setup;

	if (bnxt_qplib_is_chip_gen_p5(rcfw->res->cctx))

	if (bnxt_qplib_is_chip_gen_p5_p7(rcfw->res->cctx))

		goto config_vf_res;



	lvl = ctx->qpc_tbl.level;